STLC3065 查看數據表（PDF） - STMicroelectronics

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STLC3065

WLL SUBSCRIBER LINE INTERFACE CIRCUIT

STMicroelectronics 

STLC3065

DESCRIPTION (continued)

MOS switch.

The self generated battery voltage tracks the line

resistance. In this way the power dissipation in-

side the device is low enough to allow the use of

small SMD package (TQFP44).

Other useful characteristics for application in the

WLL environment are the integrated ringing gen-

erator and the dual two wire port that allows to

drive two different terminal equipment whether

the transmission is voice or data. When one port

is transmitting the other one is idle.

The control interface is a parallel type with open

drain output and 3.3V logic levels.

The metering pulses are generated on chip start-

ing from two logic signals (0, 3.3V) one defines

the metering pulse frequency and the other the

PIN CONNECTION

metering pulse duration. An on chip circuit then

provides the proper shaping and filtering.

Metering pulse amplitude and shaping (rising and

decay time) can be programmed by external com-

ponents. A dedicated cancellation circuit avoid

possible CODEC input saturation due to Metering

pulse echo.

Constant current feed can be set from 20mA to

40mA.

Off-hook detection threshold is programmable

from 5mA to 9mA.

The device, developed in BCD100II technology

(100V process), operates in the extended tem-

perature range and integrates a thermal protec-

tion that set the device in power down when Tj

exceeds 140°C.

D0

D1

D2

P1

P2

DET1

DET2

DET

CKTTX

CTTX1

CTTX2

44 43 42 41 40 39 38 37 36 35 34

1

33

2

32

3

31

4

30

5

29

6

28

7

27

8

26

9

25

10

24

11

23

12 13 14 15 16 17 18 19 20 21 22

CSVR

ILTF

RD

RTH

IREF

RLIM

AGND

CVCC

VPOS

RSENSE

GATE

D96TL273B

ABSOLUTE MAXIMUM RATINGS

Symbol

Vpos

A/BGND

Vdig

Tj

Vbtot (1)

Parameter

Positive Supply Voltage

AGND to BGND

Pin D0, D1, D2, P1, P2, DET, DET1, DET2 CKTTX

Max. junction Temperature

Vbtot=|Vpos|+|Vbat|. (Total voltage applied to the device

supply pins).

Value

-0.4 to +17

-1 to +1

-0.4 to 5.5

150

100

(1) Vbat is self generated by the on chip DC/DC converter and can be programmed via RF1 and RF2.

RF1 and RF2 shall be selected in order to fulfil the a.m limits (see External Components Table page 13)

2/27

Unit

V

V

V

°C

V

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