STLC3065 查看數據表（PDF） - STMicroelectronics

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STLC3065

WLL SUBSCRIBER LINE INTERFACE CIRCUIT

STMicroelectronics 

FUNCTIONAL DIAGRAM

STLC3065

Tip1

Ring1

Tip2

Ring2

SW4T

SW3T

SW1T

SW1T

SW2T

SW2R

CONTROL

INTERFACE

SLIC core

TX

RX

SW4R

300µA

SW6R

SW5R

SW3R

300µA

DC/DC converter

controller

The STLC3065 operating modes will be obtained

as combination of the SLIC core status and the

dual port configuration.

The DC/DC converter controller is driving an ex-

ternal power MOS transistor (P-Channel) in order

to generate the negative battery voltage needed

for device operation.

The DC/DC converter controller is synchronised

with an external CLK (125KHz typ.).

From version marked STLC3065 A5, it can be

synchronised to an internal clock generated when

the pin CLK is connected to CVCC. One sensing

resistor in series to Vpos supply allows to fix the

maximum allowed input peak current. This feature

is implemented in order to avoid overload on

Vpos supply in case of line transient (ex. ring trip

detection).

The typical value is obtained for a sensing resis-

tor equal to 110mΩ that will guarantee an aver-

age current consumption from Vpos < 700mA.

In on-hook condition the self generated battery

voltage is set to a predefined value.

This value can be adjusted via one external resis-

tor (RF1) and it is typical -50V. When RING mode

is selected this value is increased up to -70V typ.

Once the line goes in off-hook condition the

DC/DC converter automatically adjust the gener-

ated battery voltage in order to feed the line with

a fixed DC current (programmable via RLIM) opti-

mising in this way the power dissipation.

The Dual Port allows to connect the SLIC core to

one of the two possible 2W ports (TIP1/RING1,

TIP2/RING2).

Dual port concept

One switches array integrated in STLC3065 al-

lows to connect the TIP and RING output of the

SLIC core to one of the two 2W ports

(TIP1/RING1 or TIP2/RING2). For special condi-

tions it is also possible to connect both ports to

the SLIC core.The structure of the switches array

is shown in fig.1 and it is controlled via the two

logic inputs P1 and P2.

Depending on the switches configurations each

2W port (TIP1/RING1 or TIP2/RING2) can be set

in four possible conditions:

Open

Connected to BGND and Battery via two inte-

grated 1.5KΩ resistors.

Connected to the SLIC core

Connected to an internal 300µA (min.) current

source.

Depending on the SLIC core operating modes

(defined by D0,D1 and D2) only a subset of these

conditions can be programmed.

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