DS1743P-70 查看數據表（PDF） - Maxim Integrated
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DS1743P-70 Datasheet PDF : 17 Pages
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DS1743/DS1743P Y2K-Compliant, Nonvolatile Timekeeping RAMs
PIN DESCRIPTION
PIN
PDIP PowerCap
NAME
1
1, 2, 3,
31–34
N.C.
2
30
A12
3
25
A7
4
24
A6
5
23
A5
6
22
A4
7
21
A3
8
20
A2
9
19
A1
10
18
A0
11
16
DQ0
12
15
DQ1
13
14
DQ2
14
17
GND
15
13
DQ3
16
12
DQ4
17
11
DQ5
18
10
DQ6
19
9
DQ7
FUNCTION
No Connection
Address Input
Data Input/
Output
Ground
Data Input/
Output
PIN
PDIP PowerCap
20
8
21
28
22
7
23
29
24
27
25
26
26
—
27
6
28
5
—
4
—
—
NAME
CE
A10
OE
A11
A9
A8
CE2
WE
VCC
RST
X1, X2
VBAT
FUNCTION
Chip Enable,
Active Low
Address Input
Output Enable,
Active Low
Address Input
Chip Enable 2
Write Enable,
Active Low
Power-Supply
Input
Power-On Reset
Output, Active
Low
Crystal
Connection
Battery
Connection
2 of 17
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