EP9132 查看數據表（PDF） - Unspecified

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EP9132

HDMI 1.3 Splitter

Unspecified 

User Guide — EP9132_UG V0.1

THSC Link Disabled (Tx power down) to LINK_ON Low4

250

TFSC

Link Enabled (DE Active) to LINK_ON High1

25

40

NOTES:

1. Guaranteed by design.

2. Jitter defines as per DVI 1.0 Specification, Section 4.6 Jitter Specification.

3. Jitter measured with Clock Recovery Unit as per DVI 1.0 Specification, Section 4.7 Electronical Measurement Procedures

4. Measured when transmitter was powered down.

ms

DE

edges

Transmitter AC Specifications (under normal operating conditions unless otherwise specified)

Symbol

Parameter

SLHT Differential Swing Low-to-High Transition Time

SHLT

Differential Swing High-to-Low Transition Time

Conditions

CLOAD = 5pF,

RLOAD = 50 ohm,

REXT_SWING = 300 ohm

CLOAD = 5pF,

RLOAD = 50 ohm,

REXT_SWING = 300 ohm

Min Typ

Max Units

170 200

230

ps

170 200

230

ps

2 Jitter can be estimated by 1) triggering a digital scope at the rising of input clock and 2) measuring the peak to peak time spread

of the rising edge of the input clock at both 0.5us and 1.0us after the trigger.

3 Actual jitter tolerance may be higher depending on the frequency of the jitter.

Figure 2-3 Differential Output Timing Definition

AVCC

VOD = ABS{(TX+) - (TX-)}

80% VOD

50ohm

TX+

20% VOD

TX-

5pF

SLHT

SHLT

Explore Confidential Proprietary

11

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