ADM1062ACPZ 查看數據表（PDF） - Analog Devices

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ADM1062ACPZ

Super Sequencer with Margining Control and Temperature Monitoring

Analog Devices 

ADM1062

The hysteresis value is given by

VHYST = VR × NTHRESH/255

where:

VHYST is the desired hysteresis voltage.

NTHRESH is the decimal value of the 5-bit hysteresis code.

Note that NTHRESH has a maximum value of 31. The maximum

hysteresis for the ranges is listed in Table 6.

INPUT GLITCH FILTERING

The final stage of the SFDs is a glitch filter. This block provides

time-domain filtering on the output of the SFD comparators,

which allows the user to remove any spurious transitions, such

as supply bounce at turn-on. The glitch filter function is in addition

to the digitally programmable hysteresis of the SFD comparators.

The glitch filter timeout is programmable up to 100 μs.

For example, when the glitch filter timeout is 100 μs, any pulse

appearing on the input of the glitch filter block that is less than

100 μs in duration is prevented from appearing on the output of

the glitch filter block. Any input pulse that is longer than 100 μs

appears on the output of the glitch filter block. The output is

delayed with respect to the input by 100 μs. The filtering

process is shown in Figure 23.

INPUT PULSE SHORTER

THAN GLITCH FILTER TIMEOUT

INPUT PULSE LONGER

THAN GLITCH FILTER TIMEOUT

PROGRAMMED

TIMEOUT

PROGRAMMED

TIMEOUT

INPUT

t0

tGF

INPUT

t0

tGF

OUTPUT

OUTPUT

t0

tGF

t0

tGF

Figure 23. Input Glitch Filter Function

Data Sheet

VP1 Glitch Filtering

If the ADC round-robin is used, it is recommended to enable

glitch filtering on VP1 because the ADC input mux is connected

to VP1 when the ADC round-robin stops. When the ADC

round-robin stops, a small internal glitch on the VP1 monitor

rail occurs, and if the rail is close to the UV threshold, it may be

enough to trip the VP1 UV comparator. Use any value of glitch

filter greater than 0 μs to avoid false UV triggers. For more

information about the ADC round-robin, see the Voltage

Readback section.

SUPPLY SUPERVISION WITH VXx INPUTS

The VXx inputs have two functions. They can be used as either

supply fault detectors or digital logic inputs. When selected as

analog (SFD) inputs, the VXx pins have functionality that is

very similar to the VH and VPx pins. The primary difference is

that the VXx pins have only one input range: 0.573 V to 1.375 V.

Therefore, these inputs can directly supervise only the very low

supplies. However, the input impedance of the VXx pins is high,

allowing an external resistor divide network to be connected to the

pin. Thus, potentially any supply can be divided down into the

input range of the VXx pin and supervised, enabling the ADM1062

to monitor other supplies, such as +24 V, +48 V, and −5 V.

An additional supply supervision function is available when the

VXx pins are selected as digital inputs. In this case, the analog

function is available as a second detector on each of the dedi-

cated analog inputs, VPx and VH. The analog function of VX1

is mapped to VP1, VX2 is mapped to VP2, and so on; VX5 is

mapped to VH. In this case, these SFDs can be viewed as secondary

or warning SFDs.

The secondary SFDs are fixed to the same input range as the

primary SFDs. They are used to indicate warning levels rather

than failure levels. This allows faults and warnings to be gener-

ated on a single supply using only one pin. For example, if VP1

is set to output a fault when a 3.3 V supply drops to 3.0 V, VX1

can be set to output a warning at 3.1 V. Warning outputs are

available for readback from the status registers. They are also

OR’ed together and fed into the SE, allowing warnings to generate

interrupts on the PDOs. Therefore, in this example, if the

supply drops to 3.1 V, a warning is generated and remedial

action can be taken before the supply drops out of tolerance.

Rev. D | Page 16 of 35

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