ESMT
Pin Assignment
Preliminary
AD8258A
Pin Description
PIN NAME TYPE
1
N.C.
2
N.C.
3
N.C.
4
N.C.
5 PLL_Byp I
6 MCLK I
7 CLK_OUT O
8 DGND P
9
TV
I
10 DVDD P
11 DEF
I
12 FSEL
I
DESCRIPTION
Master clock input
Clock output from PLL
Digital Ground
1: hardware control, 0:I2C control
Digital Power
Default volume setting
0: 48kHz, 1:96kHz
Elite Semiconductor Memory Technology Inc.
CHARACTERISTICS
Schmitt trigger TTL input buffer
Schmitt trigger TTL input buffer
TTL output buffer
Schmitt trigger TTL input buffer
Schmitt trigger TTL input buffer
Schmitt trigger TTL input buffer
Publication Date: Sep. 2007
Revision: 0.1 2/37