PIN #
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
Signal Name
RE_CLK-
RE_CLK+
GND
RE_3-
RE_3+
NC
NC
GND
NC
NC
NC
NC
NC
LVDS
NC
NC
NC (reserved)
NC (reserved)
NC (reserved)
NC (reserved)
Description
Clock Signal(-)
Clock Signal(+)
Ground
Negative(-) LVDS differential data input
Positive(+) LVDS differential data input
No connection
No connection
Ground
No connection
No connection
No connection
No connection
No connection
Select LVDS data order (NS: High/Open, JEIDA: Low)
No connection
No connection
No connection (AUO internal use)
No connection (AUO internal use)
No connection (AUO internal use)
No connection (AUO internal use)
Note 1: All GND (ground) pins should be connected together and should also be connected to the LCD’s
metal frame.
Note 2: All VDD (power input) pins should be connected together.
Note 3: All NC (no connection) pins should be open without voltage input.
©Copyright AU Optronics Corp.
2007 All Rights Reserved.
No Reproduction and Redistribution Allowed
T460HW03 V1
10/31