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11274-901

Programmable Line Lock Clock Generator IC

AMI Semiconductor 

FS6131-01

Programmable Line Lock Clock Generator IC

4.4.1 VCXO Tuning

The VCXO may be coarse tuned by a programmable ad-

justment of the crystal load capacitance via the XCT[3:0]

control bits. See Table 11 for the control code and the

associated loading capacitance.

The actual amount of frequency warping caused by the

tuning capacitance will depend on the crystal used. The

VCXO tuning capacitance includes an external 6pF load

capacitance (12pF from the XIN pin to ground and 12pF

from the XOUT pin to ground). The fine tuning capability

of the VCXO can be enabled by setting the XLVTEN bit

to a one, or disabled by setting it to a zero.

Figure 11 shows the typical effect of the coarse and fine

tuning mechanisms. The total coarse tune range is about

350ppm. The difference in VCXO frequency in parts per

million (ppm) is shown as the fine tuning voltage on the

XTUNE pin varies from 0V to 5V. Note that as the crystal

load capacitance is increased the VCXO frequency is

pulled somewhat less with each coarse step, and the fine

tuning range decreases. The fine tuning range always

overlaps a few coarse tuning ranges, eliminating the pos-

sibility of holes in the VCXO response. The different

crystal warping characteristics may change the scaling on

the Y-axis, but not the overall characteristic of the curves.

Figure 11: VCXO Coarse and Fine Tuning

VCXO Range (ppm) vs. XTUNE Voltage (V)

200

150

XTUNE Voltage = 0.0V

100

XTUNE Voltage = 5.0V

50

0

-50

-100

-150

-200

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Coarse Tune Setting XCT[3:0]

4.5 Crystal Loop

The Crystal Loop is designed to attenuate the jitter on a

highly jittered, low-Q, low frequency reference. The

Crystal Loop can also maintain a constant frequency out-

put into the Main Loop if the low frequency reference is

intermittent.

The Crystal Loop consists of a Voltage-Controllable

Crystal Oscillator (VCXO), a divider, a PFD, and a charge

pump that tunes the VCXO to a frequency reference. The

frequency reference is phase-locked to the divided fre-

quency of an external, high-Q, jitter-free crystal, thereby

locking the VCXO to the reference frequency. The VCXO

can continue to run off the crystal even if the frequency

reference becomes intermittent.

4.5.1 Locking to an External Frequency Source

When the Crystal Loop is synchronized to an external

frequency source, the FS6131 can monitor the Crystal

Loop and detect if the loop unlocks from the external

source. The Crystal Loop tries to drive to zero frequency

if the external source is dropped, and sets a Lock Status

error flag.

The Crystal Loop can also detect if the VCXO has

dropped out of the Fine Tune range, requiring a change

to the Coarse Tune. The Lock Status also latches the

direction the loop went out of range (high or low) when

the loop became unlocked.

4.5.1.1 Crystal Loop Lock Status Flag

To enable this mode, clear the STAT[1] and STAT[0] bits

to zero. If the CMOS bit is set to one, the LOCK/IPRG pin

will be low if the Crystal Loop becomes unlocked. The

flag is always available under software control by reading

back the STAT[1] bit, which is overwritten with a the

status flag (low = unlocked) in this mode (see Table 6).

7

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