FS6205-01 查看數據表（PDF） - AMI Semiconductor
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FS6205-01 Datasheet PDF : 7 Pages
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FS6205
VCXO Clock Generator IC
Table 2: Pin Descriptions
Key: AI = Analog Input; AO = Analog Output; DI = Digital Input; DIU = Input with Internal Pull-Up; DID = Input with Internal Pull-Down; DIO = Digital Input/Output; DI-3 = Three-Level Digital Input,
DO = Digital Output; P = Power/Ground; # = Active Low pin
PIN
TYPE
NAME
DESCRIPTION
1
AI
XIN
VCXO Crystal Feedback
2
P
VDD
Power Supply (+3.3V nominal)
3
AI
XTUNE
VCXO Tune
4
P
VSS
Ground
5
DO
CLK
Clock Output
6
DIU
FS
Frequency Select Input (changes PLL Frequencies)
7
DIU
MS
Multiplexer Select Input (chooses PLL A or PLL B)
8
AO
XOUT
VCXO Crystal Drive
3.0 Functional Block Description
3.1 Phase-Locked Loops (PLL)
The on-chip PLLs are a standard frequency- and phase-
locked loop architecture. The PLL multiplies the reference
oscillator to the desired frequency by a ratio of integers.
The frequency multiplication is exactly that specified by
the integer ratios.
3.2 Voltage-Controlled Crystal
Oscillator (VCXO)
The VCXO provides a tunable, low-jitter frequency refer-
ence for the rest of the FS6205 system components.
Loading capacitance for the crystal is internal to the
FS6205. No external components (other than the crystal
resonator itself) are required for operation of the VCXO.
Continuous fine-tuning of the VCXO frequency is accom-
plished by varying the voltage on the XTUNE pin. The
total change (from one extreme to the other) in effective
loading capacitance is 12pF nominal (i.e from 35pF to
13pF).
“Pulling” of the crystal oscillation frequency, is accom-
plished by altering the effective load capacitance pre-
sented to the crystal by the oscillator circuit. The actual
amount that changing the load capacitance alters the os-
cillator frequency will be dependent on the characteristics
of the crystal as well as the oscillator circuit itself.
Specifically, the motional capacitance of the crystal (usu-
ally referred to by crystal manufacturers as C1), the static
capacitance of the crystal (C0), and the load capacitance
(CL) of the oscillator determine the “warping” or “pulling”
capability of the crystal in the oscillator circuit.
A simple formula to obtain the pulling capability of a
crystal oscillator is:
∆f
(
ppm)
=
C1 × (C L2 − C )L1 ×106
2 × (C0 + C L2)× (C0 + C )L1
where CL1 and CL2 are the two extremes of the applied
load capacitance.
EXAMPLE: A crystal with the following parameters is
used. With C1 = 0.02pF, C0 = 5pF, CL1 = 13pF, and CL2 =
35pF, the tuning range between extreme settings of
XTUNE voltage is:
∆f
=
0.02 × (35 −13)×106
2 × (5 + 35)× (5 + 13)
≈ 306 ppm .
250
200
150
100
50
0
0
0.5
1
1.5
2
2.5
3
3.5
-50
-100
-150
-200
-250
V(XTUNE) - volts
Figure 3 - Typical VCXO Characteristic
2
ISO9001
2.28.02
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