DM560P 查看數據表（PDF） - Davicom Semiconductor, Inc.

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DM560P

V.90 Integrated Data/Fax/Voice/Speakerphone Modem Device Set

Davicom Semiconductor, Inc. 

DM560P

V.90 Integrated Data/Fax/Voice/Speakerphone Modem Device Set

DM6583 Pin Description

Pin No.

Pin Name

I/O

Description

1-8

UD0 - UD7

I/O Data Bus Signal, for internal modem:

These signals are connected to the data bus of the PC I/O. They are

used to transfer data between the PC and the DM6583.

Modem Control Output, for external modem:

Memory address mapping of the controller is E800H.

9

/IOR

I I/O Read:

An active low input signal used to read data from the DM6583.

10, 41, 68,

GND

P Ground

85, 96

11

/IOW

I I/O Write:

An active low input signal used to write data to the DM6583.

12

/AEN

I Address Enable:

This is an active low signal to enable the system address for

DM6583.

13 - 24

A11 - A0

I System Address:

These signals are connected to the bus of PC I/O. They are used to

select DM6583 I/O ports.

A0~A7:Modem Control Input for external modem. Memory address

mapping of the controller is E800H.

25, 36, 52,

VDD

P +5V Power Supply

100

26, 27, 28, IRQ4, IRQ5,

O Interrupt Request:

29, 33, 34, IRQ7, IRQ10,

These are the interrupt request pins. Only one pin, which is

35, 59

IRQ11, IRQ12,

decoded from Configuration Register can be active. The active pin

IRQ15, IRQ3

will go high when an interrupt request is generated from the

DM6583.

30

RESET

I Reset:

An active high signal used to reset the DM6583.

31

XTAL1

I Crystal Oscillator Input

32

XTAL2

O Crystal Oscillator Output

37

/PWR

O Controller Program Write Enable:

This pin is used to enable FLASH ROM programming. In

configurations with no FLASH memory, this pin is not connected.

51

/LCS

I Loop Current Detection. Modem Input Control:

This pin is mapped to bit0 of address D000H.

39

/RUCS

O RX DSP Register Select Output:

Memory address mapping of the controller is E400H.

40,38

CA16,CA17

O Bank Switch Control:

These signals are used to switch external program memory

between banks.

CA16 CA17

Bank 0 0 0

Bank 1 1 0

Bank 2 0 1

Bank 3 1 1

42

T0

I Controller Counter 0 Input

6

Preliminary

Version: DM560P-DS-P07

August 11, 2000

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