GM5115H 查看數據表（PDF） - Genesis Microchip

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GM5115H

OnPanel LCD Panel Controller

Genesis Microchip 

*** Genesis Microchip Confidential ***

gm5115/25 Preliminary Data Sheet

Revision History

Document

Description

Date

C5115-DAT-01A • Initial release.

March 2001

C5115-DAT-01B • In Table 18 corrected description of OSC_SEL (on pin ROM_ADDR13). It should be set to 1 to

indicate usage of a single-ended clock oscillator.

• Corrected image and orientation of logo in pin out diagram Figure 2.

• Added section 4.11.3.

June 2001

C5115-DAT-01C • Replaced all occurrences of CVDD with CVDD_2.5, including pin numbers 26, 88, 134 and 203 July 2001

to make them consistent with the names of other 2.5V voltage supply signals.

C5115-DAT-01D • Pin number 205 name changed from GPIO16/HFS to GPIO16/HFSn and all occurrences of

HFS replaced with HFSn to reflect the fact that this signal is active low.

July 2001

• Added description of 2-wire serial protocol in section 4.17.2 and Table 24.

• Removed “Read with Increment” operation description.

• Corrected mechanical specification in Figure 32.

• Changes to Table 21 – DC Characteristics:

- Maximum voltage for 5V-tolerance inputs is 5.5V.

- Added maximum current requirements.

• Added description of OCM Standalone configuration Figure 26.

• Added Figure 22 – Panel Power Sequencing.

C5115-DAT-01E • Added description of gm5125 (SXGA device).

• Pin names changed to reflect alternate hard-wired functions:

- pin 50 from GPIO11 to GPIO11/ROM_WEn,

- pin 51 from GPIO12 to GPIO12/NVRAM_SDA,

- pin 52 from GPIO13 to GPIO13/NVRAM_SCL,

- pin 6 from DDC_SCL to GPIO14/DDC_SCL,

- pin 7 from DDC_SDA to GPIO15/DDC_SDA,

- pin 46 from GPIO6 to GPIO6/TCON_SHC,

- pin 47 from GPIO7 to GPIO7/TCON_TDIV.

August 2001

• Removed description of 6-wire host interface, since this is not recommended operation. Pin 1

name changed from GPIO17/HDATA0 to GPIO17, and similarly for pins 206, 207 and 208.

• Corrected maximum ADC sampling frequency in Table 15 and maximum ADC_CLK frequency

in Table 22 to 162.5MHz.

• Added section 4.5 Test Pattern Generator.

• Added description of TCON_SHC and TCON_TDIV in section 4.13.1.

• Clarifications to section 4.1 describing clock generation, section 4.7.2 describing sRGB support,

and section 4.15.3 describing GPIOs.

• Removed mention of row attributes in Figure 25.

gm5115/25 OSD controller does not have row attributes.

• Corrected Table 21, Note 3. Pins VDD1_ADC_2.5, VDD2_ADC_2.5, VDD_RX0_2.5,

VDD_RX1_2.5 and VDD_RX2_2.5 are digital 2.5V supplies, not analog.

• Changed signal names SCL and SDA to HCLK and HFSn, respectively in Figure 29, Figure 30,

and Figure 31.

C5115-DAT-01F • Added note on Front Cover regarding HDCP enabled versions.

• Added section 4.12 - Energy Spectrum Management (ESM).

October 2001

• Added clarification in section 4.13.1 indicating that single bus configurations are supported in

XGA column drivers only.

• In section 4.16, clarified that ROM_ADDR[15:0] have internal 60KΩ pull-down resistor.

• Changes to Table 20 – Absolute Maximum Ratings:

– Renamed parameters θJA_XGA, θJA_SXGA, θJC_XGA and θJC_SXGA to θJA_5115, θJA_5125, θJC_5115 and

θJC_5125 and revised their values.

– Added note (4) regarding the maximum case temperature.

• Changes to Table 21 – DC Characteristics:

– Renamed parameters P5115 and P5125 and revised their values.

– Revised the values of PLP and ILP.

– Renamed parameters I5115, I5115_2.5_VDD, etc.

– Added note (6).

• Removed the clock speed column from section 6 – Ordering Information and added the ordering

information for gm5115-H and gm5125-H.

• Replaced occurrences of TMDS with DVI.

• Changed TCON_RCLK to TCON_ROWCLK in Figure 2 and in Table 7.

• Changed RCLK to ROWCLK in 4.13.2 and in Figure 24.

June 2002

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C5115-DAT-01H

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