MP1232LPCMA 查看數據表（PDF） - IMP, Inc
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MP1232LPCMA Datasheet PDF : 7 Pages
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IMP1232LP/LPS
Application Information
Supply Voltage Monitor
Reset Signal Polarity and Output Stage Structure
RESET is an active LOW signal. It is developed with an open
drain driver. If a pullup resistor is required, typical values are
10kΩ to 50kΩ.
RESET is an active High signal developed by a CMOS push-pull
output stage and is the logical opposite to RESET.
Trip Point Tolerance Selection
With TOL connected to VCC, RESET and RESET become active
whenever VCC falls below 4.5V. RESET and RESET become active
when VCC falls below 4.75V if TOL is connected to ground.
After VCC has risen above the trip point set by TOL, RESET and
RESET remain active for a minimum time period of 250ms.
On power-down, once VCC falls below the reset threshold RESET
stays LOW and is guaranteed to be 0.4V or less until VCC drops
below 1.2V. The active HIGH reset signal is valid down to a VCC
level of 1.2V also.
4.25V
tR
4.75V
VCCTP
Tolerance
Select
TOL = VCC
TOL = GND
Tolerance
10%
5%
TRIP Point Voltage (V)
Min Nominal Max
4.25
4.37
4.49
4.5
4.62
4.74
1232_t02.eps
Manual Reset Operation
Push-button switch input, PBRST, allows the user to override the
internal trip point detection circuits and issue reset signals. The
pushbutton input is debounced and is normally pulled HIGH
through an internal 40kΩ resistor.
When PBRST is held LOW for the minimum time tPB , both resets
become active and remain active for approximately a minimum
time period of 250ms after PBRST returns HIGH.
The debounced input is guaranteed to recognize pulses greater
than 20ms. No external pull-up resistor is required, since PBRST
is pulled HIGH by an internal 40kΩ resistor.
The PBRST can be driven from a TTL or CMOS logic line or short-
ed to ground with a mechanical switch.
PBRST
tPB
tPDLY
VIH
VIL
VCC
tRPU
RESET
RESET
VOH
RESET
tRST
VOH
VOL
1232_08.eps
VOL
Figure 1. Timing Diagram: Power Up
RESET
1232_05.eps
Figure 3. Timing Diagram: Pushbutton Reset
5V
IMP1232LP/LPS
tF
VCC
4.75V
VCCTP
4.25V
1
PBRST
2
TD
8
VCC
7
ST
3
6
TOL RESET
4
5
GND RESET
µP
RESET
RESET
tRPD
1232_06.eps
Figure 4. Application Circuit: Pushbutton Reset
VOH
RESET
VOL
Figure 2. Timing Diagram: Power Down
1232_04.eps
4
408-432-9100/www.impweb.com
© 1999 IMP, Inc.
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