FDC87W22 查看數據表（PDF） - SMSC -> Microchip

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FDC87W22

Power I/O Controller

SMSC -> Microchip 

PIN DESCRIPTION

I/O8t

I/O12t

I/O24t

OUT8t

OUT12t

OD12

OD24

INt

INc

INcs

TTL level bidirectional pin with 8 mA source-sink capability

TTL level bidirectional pin with 12 mA source-sink capability

TTL level bidirectional pin with 24 mA source-sink capability

TTL level output pin with 8 mA source-sink capability

TTL level output pin with 12 mA source-sink capability

Open-drain output pin with 12 mA sink capability

Open-drain output pin with 24 mA sink capability

TTL level input pin

CMOS level input pin

CMOS level schmitt-triggered input pin

Note: Refer to DC CHARACTERISTICS section for details.

Host Interface

SYMBOL

D0−D7

A0−A9

A10

IOCHRDY

PIN

66-73

51-55

57-61

75

5

MR

6

nCS

2

AEN

62

nIOR

63

nIOW

64

DRQ_B

100

nDACK_B

98

DRQ_C

4

nDACK_C

18

TC

97

nIRQIN

93

IRQ_A/

96

GIO1

I/O

I/O24t

INc

INc

OD24

INcs

INt

INc

INcs

INcs

OUT12t

INc

OUT12t

INc

INc

INc

OUT12t

I/O12t

FUNCTION

System data bus bits 0-7

System address bus bits 0-9

In ECP Mode, this pin is the A10 address input.

In EPP Mode, this pin is the IO Channel Ready output to

extend the host read/write cycle.

Master Reset. Active high. MR is low during normal

operations.

Active low chip select signal

System address bus enable

CPU I/O read signal

CPU I/O write signal

DMA request signal B

DMA Acknowledge signal B

DMA request signal C

DMA Acknowledge signal C

Terminal Count. When active, this pin indicates termination

of a DMA transfer.

Interrupt request input

When CR16 Bit 4 (GOIQSEL) = 0: Interrupt request signal

A;

When CR16 Bit 4 (GOIQSEL) = 1: General Purpose I/O port

1.

6

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