VV0670P001 查看數據表（PDF） - Vision

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VV0670P001

Colour Processor Interface ASIC

Vision 

Colour Processor Interface ASIC

Pin

Signal

168

RAMD[15]

Type

I/O (10)

Description

DRAM data

drive

2 mA

If the target application requires that only one interface mode is required (eg. USB interface only), please

refer to the above table and notes 7, 8 and 9 to establish how unused pins should be electrically connected

on the PCB. Failure to ensure such pins are correctly connected may result in erroneous system behaviour.

Notes:

1. Internal pullups.

2. These pins shall go tri-state when LOPOW is high.

3. TTL level Schmitt input.

4. Output

VIL(max)= 0.8V, VIH (MIN)= 2.2V, schmitt trigger hysteresis=250mV (typ).

Input leakage -10µA to +10µA, VIN : 0 to DVDD

VOL(max) =0.4V @ IOL =16mA

VOH(min) =2.4V @ IOH = -12mA

5. These signals to comply with USB Specification Version 1.0 section 7.

6. Open drain output.

VOL(max) =0.4V @ IOL =3mA

7. This pin does not require connection if CPiA is used for parallel port interfacing products only.

8. This pin should be tied low if CPiA is used for parallel port interfacing products only.

9. This pin does not require connection if CPiA is used for USB interfacing products only.

10. These pins shall go tri-state when NORM is high.

Where I/O pad type is not explicitly defined in the above notes assume CMOS.

V:\apps\cpia\docs\cpia datasheet\cpia_datasheet4.fm

02/07/98

6

Commercial In Confidence

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