DSP56F807 查看數據表（PDF） - Motorola => Freescale
零件编号
产品描述 (功能)
生产厂家
DSP56F807 Datasheet PDF : 52 Pages
| |||
Freescale Semiconductor, Inc.
GPIO Signals
Table 10. Interrupt and Program Control Signals (Continued)
No. of
Pins
Signal
Name
Signal
Type
State During
Reset
Signal Description
1
RESET
Input
(Schmitt)
1
EXTBOOT Input
(Schmitt)
Input
Input
Reset—This input is a direct hardware reset on the processor.
When RESET is asserted low, the device is initialized and
placed in the Reset state. A Schmitt trigger input is used for
noise immunity. When the RESET pin is deasserted, the initial
chip operating mode is latched from the EXTBOOT pin. The
internal reset signal will be deasserted synchronous with the
internal clocks, after a fixed number of internal clocks.
To ensure complete hardware reset, RESET and TRST should
be asserted together. The only exception occurs in a
debugging environment when a hardware device reset is
required and it is necessary not to reset the OnCE/JTAG
module. In this case, assert RESET, but do not assert TRST.
External Boot—This input is tied to VDD to force device to boot
from off-chip memory. Otherwise, it is tied to VSS.
2.6 GPIO Signals
Table 11. Dedicated General Purpose Input/Output (GPIO) Signals
No. of
Pins
Signal
Name
8
GPIOB0-G
PIOB7
6
GPIOD0-G
PIOD5
Signal
Type
Input
or
Output
Input
or
Output
State During
Reset
Signal Description
Input
Input
Port B GPIO—These eight pins are dedicated General
Purpose I/O (GPIO) pins that can individually be programmed
as input or output pins.
After reset, the default state is GPIO input.
Port D GPIO—These six pins are dedicated GPIO pins that
can individually be programmed as an input or output pins.
After reset, the default state is GPIO input.
2.7 Pulse Width Modulator (PWM) Signals
Table 12. Pulse Width Modulator (PWMA and PWMB) Signals
No. of
Pins
Signal
Name
Signal
Type
State During
Reset
Signal Description
6
PWMA0-5 Output
Tri- stated PWMA0-5— Six PWMA output pins.
3
ISA0-2
Input
Input
ISA0-2— These three input current status pins are used for
(Schmitt)
top/bottom pulse width correction in complementary channel
operation for PWMA.
4 FAULTA0-3 Input
(Schmitt)
Input
FAULTA0-3— These Fault input pins are used for disabling
selected PWMA outputs in cases where fault conditions
originate off-chip.
6
PWMB0-5 Output
Tri- stated PWMB0-5— Six PWMB output pins.
56F807 Technical Data
11
For More Information On This Product,
Go to: www.freescale.com
Share Link: 