74LVC74AD(2020) 查看數據表（PDF） - NXP Semiconductors.

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74LVC74AD
(Rev.:2020)

Dual D-type flip-flop with set and reset; positive-edge trigger

NXP Semiconductors. 

Nexperia

74LVC74A

Dual D-type flip-flop with set and reset; positive-edge trigger

VI 90 %

tW

negative

pulse

VM

10 %

0V

tf

VI

positive

pulse

tr

90 %

VM

10 %

0V

tW

VM

tr

tf

VM

VI

PULSE

GENERATOR

VCC

VO

DUT

RT

CL

RL

Fig. 9.

001aaf615

Test data is given in Table 10.

Definitions for test circuit:

RL = Load resistance.

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

Test circuit for measuring switching times

Table 10. Test data

Supply voltage

VCC

1.2 V

1.65 V to 1.95 V

2.3 V to 2.7 V

2.7 V

3.0 V to 3.6 V

Input

VI

VCC

VCC

VCC

2.7 V

2.7 V

tr, tf

≤ 2 ns

≤ 2 ns

≤ 2 ns

≤ 2.5 ns

≤ 2.5 ns

Load

CL

30 pF

30 pF

30 pF

50 pF

50 pF

RL

1 kΩ

1 kΩ

500 Ω

500 Ω

500 Ω

74LVC74A

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 8 — 18 June 2020

© Nexperia B.V. 2020. All rights reserved

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