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ADJD-J823 查看數據表(PDF) - Avago Technologies

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ADJD-J823 Datasheet PDF : 18 Pages
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Powering the Device
No voltage must be applied to IO's during
power-up and power-down ramp time
VDDD / VDDA
0V
tVDD_RAMP
ESD Protection Diode Turn-On During Power-Up and Power-Down
A particular power-up and power-down sequence must
be used to prevent any ESD diode from turning on inad-
vertently. The figure above describes the sequence. In
general, AVDD and DVDD should power-up and power-
down together to prevent ESD diodes from turning on
inadvertently. During this period, no voltage should be
applied to the IO’s for the same reason.
Ground Connection
AGND and DGND must both be set to 0V and preferably
star-connected to a central power source as shown in
the application diagram. A potential difference between
AGND and DGND may cause the ESD diodes to turn on
inadvertently.
Block Diagram
SDASLV
SCLSLV
SDAPROM
SCLPROM
PWMR
PWMG
PWMB
XRST
SLEEP
DEVICE
CONTROLLER
General Specifications
Feature
Interface
Input color format
Output PWM frequency
Output PWM resolution
Supply
Value
100kHz serial interface
CIE Yxy
6.35kHz (nominal)
12 bits
2.6V digital (nominal), 2.6V analog (nominal)
RGB
PHOTOSENSOR
ARRAY
PHOTOCURRENT
TO VOLTAGE
CONVERSION
RED
PHOTOCURRENT
TO VOLTAGE
CONVERSION
GREEN
PHOTOCURRENT
TO VOLTAGE
CONVERSION
BLUE
ANALOG TO
DIGITAL
CONVERSION


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