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AK4309 查看數據表(PDF) - Asahi Kasei Microdevices

零件编号
产品描述 (功能)
生产厂家
AK4309
AKM
Asahi Kasei Microdevices AKM
AK4309 Datasheet PDF : 14 Pages
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ASAHI KASEI
[AK4309B]
PIN/FUNCTION
No. Pin Name I/O
Function
1 TST1
I Test Pin
(Pull-down pin)
Must be left floating or tied to DVSS.
2 DVDD
- Digital Power Supply Pin
3 DVSS
- Digital Ground Pin
4 NC
- No Connection
5 RST
I Reset Pin
When at "L", the AK4309B is in power-down mode and is held in reset.
The AK4309B should always be reset upon power-up.
6 MCLK
I Master Clock Input Pin
An external TTL clock should be input on this pin.
The fs is selected by CKS pin.
7 CKS
I Master Clock Select Pin
"L": MCLK=256fs, "H": MCLK=384fs
8 BICK
I Serial Bit Input Clock Pin
This clock is used to latch SDATA.
9 SDATA
I Serial Data Input Pin
2's complement MSB-first data is input on this pin.
10 LRCK
I L/R Clock Pin
This input determines which channel is currently being input on the Serial
Data Input pin, SDATA. "H": Lch, "L": Rch
11 AOUTR
O Rch analog output pin
12 AOUTL
O Lch analog output pin
13 VCOM
O Common Voltage pin, AVDD/2
Normally connected to AVSS with a 0.1uF ceramic capacitor in parallel with
a 10uF electrolytic cap.
14 AVDD
- Analog Power Supply Pin
15 AVSS
- Analog Ground Pin
16 NC
- No Connection
17 NC
18 VREFH
I "H" Voltage Reference Input Pin
The differential Voltage between VREFH and VREFL inputs set the analog
output range. The VREFH pin is normally connected to AVDD and the
VREFL pin is connected to AVSS. A 0.1uF ceramic capacitor should be as
near to both pins.
19 VREFL
I "L" Voltage Reference Input Pin
20 DZF
O Zero Input Detect Pin
When SDATA of both channels follow a total 8192 LRCK cycles with "0"
input data, this pin goes "H".
* NC pins are not bonded internally.
0177-E-00
-3-
1997/6

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