AK4309 查看數據表（PDF） - Asahi Kasei Microdevices
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AK4309 Datasheet PDF : 14 Pages
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ASAHI KASEI
SWITCHING CHARACTERISTICS
(Ta=25°C; AVDD,DVDD=4.5∼5.5V; CL=20pF)
Parameter
Symbol
min
typ
Master Clock Timing 256fs:
Pulse Width Low
Pulse Width High
384fs:
Pulse Width Low
Pulse Width High
LRCK
Frequency
Duty Cycle
Serial Interface Timing
BICK Period
BICK Pulse Width Low
Pulse Width High
BICK rising to LRCK edge (Note 11 )
LRCK Edge to BICK rising (Note 11 )
SDATA Hold Time
SDATA Setup Time
fCLK
tCLKL
tCLKH
fCLK
tCLKL
tCLKH
2.048
28
28
3.072
23
23
fs
Duty
8
44.1
45
tBCK
tBCKL
tBCKH
tBLR
tLRB
tSDH
tSDS
312.5
100
100
50
50
50
50
Reset Timing
RST Pulse Width (Note 12 )
tRST
150
Notes: 11 . BICK rising edge must not occur at the same time as LRCK edge.
12 . The AK4309B can be reset by bringing RST "L" to "H" only upon power up.
[AK4309B]
max
Unit
12.8
MHz
ns
ns
19.2
MHz
ns
ns
kHz
50
kHz
55
%
ns
ns
ns
ns
ns
ns
ns
ns
0177-E-00
-7-
1997/6
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