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零件编号
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4C4M4E1Q-50TC 查看數據表(PDF) - Alliance Semiconductor
零件编号
产品描述 (功能)
生产厂家
4C4M4E1Q-50TC
4M X 4 CMOS Quad CAS DRAM (EDO) family
Alliance Semiconductor
4C4M4E1Q-50TC Datasheet PDF : 16 Pages
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Logic block diagram for 4K refresh
V
CC
GND
RAS
RAS clock
generator
A0
A1
A2
A3
A4
CAS clock
CAS
generator
A5
A6
A7
A8
A9
WE clock
A10
WE
generator
A11
AS4C4M4EOQ
AS4C4M4E1Q
®
Column decoder
Sense amp
4,194,304 × 4
Array
(16,777,216)
Data
I/O
buffers
I/O0 to I/O3
OE
Logic block diagram for 2K refresh
V
CC
GND
RAS
RAS clock
generator
A0
A1
A2
A3
A4
CAS
CAS clock
generator
A5
A6
A7
A8
A9
WE clock
A10
WE
generator
Column decoder
Sense amp
4,194,304 × 4
Array
(16,777,216)
Data
I/O
buffers
I/O0 to I/O3
OE
Substrate bias
generator
Recommended operating conditions
Parameter
Symbol
Min
Nominal
Max
Unit
Supply voltage
4C4M4EOQ
AS4C4M4E1Q
V
CC
4.5
5.0
5.5
V
GND
0.0
0.0
0.0
V
Input voltage
4C4M4EOQ
AS4C4M4E1Q
V
IH
V
IL
2.4
–
–0.5
†
–
V
CC
V
0.8
V
Ambient operating temperature
T
A
0
70
°C
†
V
IL
min -3.0V for pulse widths less than 5 ns. Recommended operating conditions apply throughout this document unlesss otherwise specified.
3/22/01; v.1.0
Alliance Semiconductor
P. 3 of 16
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