5962-0325001VXC 查看數據表（PDF） - Atmel Corporation

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5962-0325001VXC

Rad Hard Reprogrammable FPGAs with FreeRAM

Atmel Corporation 

The Symmetrical

Array

At the heart of the Atmel architecture is a symmetrical array of identical cells (Figure 1).

The array is continuous from one edge to the other, except for bus repeaters spaced

every four cells (Figure 2 on page 5). At the intersection of each repeater row and col-

umn is a 32 x 4 RAM block accessible by adjacent buses. The RAM can be configured

as either a single-ported or dual-ported RAM(1), with either synchronous or asynchro-

nous operation.

Note: 1. The right-most column can only be used as single-port RAM.

Figure 1. Symmetrical Array Surrounded by I/O

= I/O Pad

= AT40K Cell

= Repeater Row

= Repeater Column

= FreeRAM

Note: AT40K has registered I/Os. Group enable every sector for tri-states on obuf’s.

4 AT40KEL040

4155I–AERO–06/06

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