AT88SC0204C-SI 查看數據表（PDF） - Atmel Corporation
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AT88SC0204C-SI Datasheet PDF : 14 Pages
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AT88SC0204C
Reset (RST)
nal pull-up resistor should be connected between SDA and VCC. The value of this
resistor and the system capacitance loading the SDA bus will determine the rise time of
SDA. This rise time will determine the maximum frequency during read operations. Low
value pull-up resistors will allow higher frequency operations while drawing higher aver-
age power supply current.
The AT88SC0204C provides an ISO 7816-3 compliant asynchronous answer to reset
sequence. When the reset sequence is activated, the device will output the data pro-
grammed into the 64-bit answer-to-reset register. An internal pull-up on the RST input
pad allows the device to be used in synchronous mode without bonding RST. The
AT88SC0204C does not support the synchronous answer-to-reset sequence.
Device Architecture
User Zones
The EEPROM user memory is divided into 4 zones of 512 bits each. Multiple zones
allow for different types of data or files to be stored in different zones. Access to the user
zones is allowed only after security requirements have been met. These security
requirements are defined by the user during the personalization of the device in the con-
figuration zone. If the same security requirements are selected for multiple zones, then
these zones may effectively be accessed as one larger zone.
Table 2. User Zones
ZONE
$0
$1
$2
$3
$4
$5
$6
$7
$000
64 bytes
–
User 0
–
$038
$000
64 bytes
–
User 1
–
$038
$000
64 bytes
–
User 2
–
$038
$000
64 bytes
–
User 3
–
$038
Control Logic
Access to the user zones occurs only through the control logic built into the device. This
logic is configurable through access registers, key registers and keys programmed into
the configuration zone during device personalization. Also implemented in the control
logic is a cryptographic engine for performing the various higher-level security functions
of the device.
3
2022ES–SMEM–07/04
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