ATC18RHA(2005) 查看數據表（PDF） - Atmel Corporation

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ATC18RHA
(Rev.:2005)

Rad. Hard 0.18 µm CMOS Cell-based ASIC for Space Use

Atmel Corporation 

ATC18RHA

Tolerance and Cold

Sparing Features

All IO18 and IO33 pads are Cold Sparing. This means that when VCCB is “off” these pads have

a negligible leakage current.

Furthermore standard IO33 pads (PCI,LVDS,LVPECL excepted) are tolerant. This means that

when

• the pad is configured as an input

• VCCB is < 3.3V (ex 1.8V)

The external signal can go up to 3.3V (max 3.6V) with negligible leakage current.

An IO33 standard pad with VCCB=1.8V can also be used as a 1.8V Compliant Output with

degraded IOL,IOH and timing performances.

Clusters

The periphery of the chip (pad ring) can be split into several I/O segments (I/O clusters) which

can be supplied at different voltages (ie “n” clusters at 1.8V and “m” clusters at 3.3V). Some

clusters can be unpowered while others are active.

A specific Power control line is distributed inside the cluster to be able to force all the I/Os of the

cluster in tristate mode whatever their initial state is (ie: an output only buffer will also be turned

to HiZ mode).

This Power Control line can be driven in two ways:

• Cold Sparing mode: the Power control line is active when VCCB is “off” (case of VCCB Power

Supply Pad including a Power Control feature).

• Hot Swap mode: a specific pad in the cluster is dedicated to Power Control. When this pad is

left open (driven to “0” by an internal pull-down) the Power Control line is activated.

ESD Protection

Multiple Supply rails architecture increases the sensitivity to Electro-Static Discharges.

VCCB,VSSB are isolated from VCC,VSS and furthermore the pad ring can be split into several

VCCB segments.

To implement conduction paths between all Power Supply rails, some specific ESD cells must

be inserted in the Pad Ring.

Two kinds of cells are used

• Back to Back Diodes between VSSB and VSS

• Grounded N-Gates between two VCCB segments

Some ESD cells are “pad count” transparent (implemented in the Die Corners) but others must

be taken into account in the Pad Ring definition (each ESD cell has the size of a standard pad).

Pad Site and Pad Pitch In ATC18RHA95 family the Standard Pad Width and Pad Pitch are 95µm.

Case of Differential Pads

• LVDS transmitter: width= 3x95µm and pitch= 190µm

• LVDS Receiver and LVPECL Receiver : width= 2x95µm and pitch=95µm

3

4261B–AERO–06/05

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