AV9107C 查看數據表（PDF） - Integrated Device Technology
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AV9107C Datasheet PDF : 9 Pages
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AV9107C
Pin Descriptions for AV9107C-03, AV9107C-05, AV9107C-10 and AV9107C-11
PIN NUMBER
-05/-10
-03
-11
1
14
14
5
1
1
2
2
3
3
4
4
2
5
5
6
6
3
7
7
4
8
8
9
9
10
10
6
11
11
7
12
12
8
13
13
PIN NAME
FS0
FS1
FS2
FS3
AGND
GND
PD
SLOW CLOCK
X1/ICLK
X2
OE(REFCLK)
OE(CLK1)
CLK1
VDD
REFCLK
TYPE
DESCRIPTION
Input
Input
Input
Input
-
-
Input
Input
Input
Output
Input
Input
Output
-
Output
Frequency Select 0 for CLK1 (-03 and -11 have pull-ups).
Frequency Select 1 for CLK1 (-03 and -11 have pull-ups).
Frequency Select 2 for CLK1 (-03 and -11 have pull-ups).
Frequency Select 3 for CLK1 (-03 and -11 have pull-ups).
Analog GROUND.
Digital GROUND.
POWER-DOWN. Shuts off chip when low. Internal pull-up.
SLOW CLOCK input. Forces CLK1 to 8 MHz (regardless of
FS condition). Has internal pull-up.
CRYSTAL OUTPUT or INPUT CLOCK frequency. Typically
14.318 MHz system clock. This input includes load
capacitance and feedback bias for a crystal.
CRYSTAL OUTPUT (No Connect when clock used.) This
input includes XTAL load capacitance.
OUTPUT ENABLE. Tristates REFCLK when low. Has
internal pull-up.
OUTPUT ENABLE. Tristates CLK1 when low. Has internal
pull-up.
CLOCK1 Output (see decoding tables).
Digital power supply.
REFERENCE CLOCK output. Produces a buffered version of
the input clock or crystal frequency (typically 14.318 MHz).
4
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