C8051F020 查看數據表（PDF） - Silicon Laboratories

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C8051F020

8K ISP FLASH MCU Family

Silicon Laboratories 

C8051F020/1/2/3

LIST OF FIGURES AND TABLES

1. SYSTEM OVERVIEW .........................................................................................................17

Table 1.1. Product Selection Guide ......................................................................................17

Figure 1.1. C8051F020 Block Diagram.................................................................................18

Figure 1.2. C8051F021 Block Diagram.................................................................................19

Figure 1.3. C8051F022 Block Diagram.................................................................................20

Figure 1.4. C8051F023 Block Diagram.................................................................................21

Figure 1.5. Comparison of Peak MCU Execution Speeds.....................................................22

Figure 1.6. On-Board Clock and Reset..................................................................................23

Figure 1.7. On-Chip Memory Map ........................................................................................24

Figure 1.8. Development/In-System Debug Diagram ...........................................................25

Figure 1.9. Digital Crossbar Diagram....................................................................................26

Figure 1.10. PCA Block Diagram............................................................................................27

Figure 1.11. 12-Bit ADC Block Diagram................................................................................28

Figure 1.12. 8-Bit ADC Diagram ............................................................................................29

Figure 1.13. Comparator and DAC Diagram...........................................................................30

2. ABSOLUTE MAXIMUM RATINGS ..................................................................................31

Table 2.1. Absolute Maximum Ratings*..............................................................................31

3. GLOBAL DC ELECTRICAL CHARACTERISTICS ......................................................32

Table 3.1. Global DC Electrical Characteristics...................................................................32

4. PINOUT AND PACKAGE DEFINITIONS........................................................................33

Table 4.1. Pin Definitions.....................................................................................................33

Figure 4.1. TQFP-100 Pinout Diagram..................................................................................38

Figure 4.2. TQFP-100 Package Drawing...............................................................................39

Figure 4.3. TQFP-64 Pinout Diagram....................................................................................40

Figure 4.4. TQFP-64 Package Drawing.................................................................................41

5. ADC0 (12-BIT ADC, C8051F020/1 ONLY) ........................................................................43

Figure 5.1. 12-Bit ADC0 Functional Block Diagram............................................................43

Figure 5.2. Temperature Sensor Transfer Function ...............................................................44

Figure 5.3. 12-Bit ADC Track and Conversion Example Timing.........................................45

Figure 5.4. ADC0 Equivalent Input Circuits .........................................................................46

Figure 5.5. AMX0CF: AMUX0 Configuration Register (C8051F020/1) .............................47

Figure 5.6. AMX0SL: AMUX0 Channel Select Register (C8051F020/1)............................48

Figure 5.7. ADC0CF: ADC0 Configuration Register (C8051F020/1)..................................49

Figure 5.8. ADC0CN: ADC0 Control Register (C8051F020/1) ...........................................50

Figure 5.9. ADC0H: ADC0 Data Word MSB Register (C8051F020/1) ...............................51

Figure 5.10. ADC0L: ADC0 Data Word LSB Register (C8051F020/1).................................51

Figure 5.11. ADC0 Data Word Example (C8051F020/1) .......................................................52

Figure 5.12. ADC0GTH: ADC0 Greater-Than Data High Byte Register (C8051F020/1) .....53

Figure 5.13. ADC0GTL: ADC0 Greater-Than Data Low Byte Register (C8051F020/1) ......53

Figure 5.14. ADC0LTH: ADC0 Less-Than Data High Byte Register (C8051F020/1) ..........53

Figure 5.15. ADC0LTL: ADC0 Less-Than Data Low Byte Register (C8051F020/1) ...........53

Figure 5.16. 12-Bit ADC0 Window Interrupt Example: Right Justified Single-Ended Data .54

Rev. 1.4

9

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