CA3126 查看數據表（PDF） - Intersil

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CA3126

TV Chroma Processor

Intersil 

Block Diagram

CA3126

TV CHROMA PROCESSOR

CHROMA

INPUT

2.45kΩ

0.01µF

TO

TERM. 12

CHROMA

INPUT

1

CW

CHROMA GAIN

10

kΩ

CCW

CONTROL

16

50kΩ 2µF

1.2kΩ KILLER

FILTER

GND 5

RF

BYPASS

0.01µF

0.01µF

4

AFPC

FILTER

1.0µF 2kΩ

0.01µF

CRYSTAL

FILTER 20pF

680Ω

23 6

7

10pF

AFPC

DET.

-π/4

φ SHIFTER

SIGNAL

SAMPLE

AND HOLD

BIAS

SAMPLE

AND HOLD

DC CONTR.

BALANCED VCO

φ SHIFTER

AMPL.

LIMIT

+π/4

φ SHIFTER

INTERN.

REF.

OVERLOAD

DETECTOR

COUPLING

NETWORK

FIRST

CHROMA

AMPL.

ATTENU-

ATOR

SECOND

CHROMA

AMPL.

BIAS

CONTROL

KILLER

AMPL.

ACC

AMPL.

ACC

DET.

SIGNAL

SAMPLE

AND HOLD

BIAS

SAMPLE

AND HOLD

CA3126

DELAY

BIAS

BALANCE-

UNBALANCE

TRANSLATOR

DELAY

BIAS

33pF

AMPL.

+11.2V

ZENER

REF.

KEYER

CARRIER

OUTPUT

8

0.01µF

SUPPLY

VOLTAGE

+24V

270Ω 10kΩ

13

2N2102

12

(NOTE 6)

0.05

µF 0.01

µF

(NOTE 6)

15

CHROMA

OUTPUT

3.9kΩ

14

9

2kΩ

0V

5µs WIDTH

HORIZONTAL

KEY INPUT

10

11

0.01µF

1µF

0.01µF

ACC

FILTER

NOTES:

6. Optional design features.

7. Pinout numbers refer to the PDIP package.

8-36

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