CAT34WC02(2005) 查看數據表（PDF） - Catalyst Semiconductor => Onsemi
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CAT34WC02 Datasheet PDF : 10 Pages
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CAT34WC02
A.C. CHARACTERISTICS
VCC = 1.7 V to 5.5 V, unless otherwise specified.
Read & Write Cycle Limits
Die Revision A, C, E
1.7V-5.5V
4.5V-5.5V
Symbol Parameter
Min.
Max.
Min.
Max.
Units
FSCL
TI(1)
Clock Frequency
Noise Suppression Time Constant at
SCL, SDA Inputs
100
400
kHz
200
200
ns
t tAA
SCL Low to SDA Data Out and ACK Out
3.5
1
µs
r tBUF(1) Time the Bus Must be Free Before a
4.7
1.2
µs
New Transmission Can Start
a tHD:STA Start Condition Hold Time
4
0.6
µs
tLOW
Clock Low Period
4.7
1.2
µs
P tHIGH
Clock High Period
4
0.6
µs
tSU:STA Start Condition Setup Time
4.7
0.6
µs
(for a Repeated Start Condition)
d tHD:DAT
e tSU:DAT
tR(1)
u tF(1)
tin tSU:STO
tDH
Data In Hold Time
Data In Setup Time
SDA and SCL Rise Time
SDA and SCL Fall Time
Stop Condition Setup Time
Data Out Hold Time
0
0
ns
50
50
ns
1
0.3
µs
300
300
ns
4
0.6
µs
100
100
ns
n Power-Up Timing(1)(2)
Symbol
Parameter
o tPUR
c tPUW
Power-up to Read Operation
Power-up to Write Operation
Min
Typ
Max
1
1
Units
ms
ms
is Write Cycle Limits
DSymbol
Parameter
Min
Typ
Max
Units
tWR
Write Cycle Time
4
10
ms
The write cycle time is the time from a valid stop
condition of a write sequence to the end of the internal
program/erase cycle. During the write cycle, the bus
interface circuits are disabled, SDA is allowed to remain
high, and the device does not respond to its slave
address.
Note:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated.
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
3
Doc No. 1003, Rev. O
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