VPULSE
RLOOP
LLOOP
R
ζ = LOOP
2
C
GATE
≥1
L
LOOP
CGATE
L
∴
R
LOOP
≥2
LOOP
C
GATE
Adstasrmosnhpgoelwnyinnr,egcm.oMimniinmmimeizniizndignedgLLtLOhLOOaPOtmPtaihnlseimogimazteiensidmthriievzeevsablteuheeloocrifastRee/LdOfaOaPllnsteicmelodese.edTtfhooertrhecerfoitSriceiCa,liMtOisSFET
aAsnpeoxstseirbnlaeltroesmisintaimncizeeoLfL6OO.P8.ΩThweainstuesrnedaltgoacthearreascitsetarinzceethoifstdheevSiciCe.MOSFETis5Ω.
Lowervaluesofexternalgateresistancecanbeusedsolongasthegatefide lity is
maintained.Intheeventthatnoexternalgateresistanceisused,itissuggested
thatthegatecurrentbecheckedtoindirectlyverifythatthereisnoringingpresent
inthegatecircuit.Thiscanbeaccomplishedwithaverysmallcurrent transformer.
Arecommendedsetupisatwo-stagecurrenttransformerasshownbelow:
IG SENSE
GATE DRIVE INPUT
VCC
GATE DRIVER
+
T1
-
SiC DMOSFET
VEE
5
CMF20120D Rev. -