CY7C1311BV18-200BZI(2011) 查看數據表（PDF） - Cypress Semiconductor

零件编号

产品描述 (功能)

生产厂家

CY7C1311BV18-200BZI
(Rev.:2011)

18-Mbit QDR™-II SRAM 4-Word Burst Architecture

Cypress Semiconductor 

Logic Block Diagram (CY7C1313BV18)

CY7C1311BV18, CY7C1911BV18

CY7C1313BV18, CY7C1315BV18

D[17:0]

18

A(17:0) 18

Address

Register

K

K

DOFF

VREF

WPS

BWS[1:0]

CLK

Gen.

Control

Logic

Write Write Write Write

Reg Reg Reg Reg

Address

Register

18

A(17:0)

Read Data Reg.

72

36

36

Control

Logic

RPS

C

C

Reg.

Reg. 18

18

Reg.

18

18

18

CQ

CQ

Q[17:0]

Logic Block Diagram (CY7C1315BV18)

D[35:0]

36

A(16:0) 17

Address

Register

K

K

DOFF

VREF

WPS

BWS[3:0]

CLK

Gen.

Control

Logic

Write Write Write Write

Reg Reg Reg Reg

Address

Register

17

A(16:0)

Read Data Reg.

144

72

72

Control

Logic

RPS

C

C

Reg.

Reg. 36

36

Reg.

36

36

36

CQ

CQ

Q[35:0]

Document Number: 38-05620 Rev. *F

Page 3 of 32

[+] Feedback

Share Link: