CY7C1311BV18-200BZI(2011) 查看數據表（PDF） - Cypress Semiconductor
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CY7C1311BV18-200BZI Datasheet PDF : 32 Pages
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CY7C1311BV18, CY7C1911BV18
CY7C1313BV18, CY7C1315BV18
Pin Configuration
The pin configuration for CY7C1311BV18, CY7C1911BV18, CY7C1313BV18, and CY7C1315BV18 follow. [1]
165-Ball FBGA (13 x 15 x 1.4 mm) Pinout
CY7C1311BV18 (2M x 8)
1
2
3
4
5
6
7
8
9
10
11
A
CQ NC/72M
A
WPS NWS1
K NC/144M RPS
A
NC/36M CQ
B
NC
NC
NC
A NC/288M K
NWS0
A
NC
NC
Q3
C
NC
NC
NC
VSS
A
NC
A
VSS
NC
NC
D3
D
NC
D4
NC
VSS
VSS
VSS
VSS
VSS
NC
NC
NC
E
NC
NC
Q4
VDDQ
VSS
VSS
VSS
VDDQ
NC
D2
Q2
F
NC
NC
NC
VDDQ
VDD
VSS
VDD
VDDQ
NC
NC
NC
G
NC
D5
Q5
VDDQ
VDD
VSS
VDD
VDDQ
NC
NC
NC
H
DOFF
VREF
VDDQ
VDDQ
VDD
VSS
VDD
VDDQ
VDDQ
VREF
ZQ
J
NC
NC
NC
VDDQ
VDD
VSS
VDD
VDDQ
NC
Q1
D1
K
NC
NC
NC
VDDQ
VDD
VSS
VDD
VDDQ
NC
NC
NC
L
NC
Q6
D6
VDDQ
VSS
VSS
VSS
VDDQ
NC
NC
Q0
M
NC
NC
NC
VSS
VSS
VSS
VSS
VSS
NC
NC
D0
N
NC
D7
NC
VSS
A
A
A
VSS
NC
NC
NC
P
NC
NC
Q7
A
A
C
A
A
NC
NC
NC
R
TDO
TCK
A
A
A
C
A
A
A
TMS
TDI
CY7C1911BV18 (2M x 9)
1
2
3
4
5
6
7
8
9
10
11
A
CQ NC/72M
A
WPS
NC
K NC/144M RPS
A
NC/36M CQ
B
NC
NC
NC
A NC/288M K
BWS0
A
NC
NC
Q4
C
NC
NC
NC
VSS
A
NC
A
VSS
NC
NC
D4
D
NC
D5
NC
VSS
VSS
VSS
VSS
VSS
NC
NC
NC
E
NC
NC
Q5
VDDQ
VSS
VSS
VSS
VDDQ
NC
D3
Q3
F
NC
NC
NC
VDDQ
VDD
VSS
VDD
VDDQ
NC
NC
NC
G
NC
D6
Q6
VDDQ
VDD
VSS
VDD
VDDQ
NC
NC
NC
H
DOFF
VREF
VDDQ
VDDQ
VDD
VSS
VDD
VDDQ
VDDQ
VREF
ZQ
J
NC
NC
NC
VDDQ
VDD
VSS
VDD
VDDQ
NC
Q2
D2
K
NC
NC
NC
VDDQ
VDD
VSS
VDD
VDDQ
NC
NC
NC
L
NC
Q7
D7
VDDQ
VSS
VSS
VSS
VDDQ
NC
NC
Q1
M
NC
NC
NC
VSS
VSS
VSS
VSS
VSS
NC
NC
D1
N
NC
D8
NC
VSS
A
A
A
VSS
NC
NC
NC
P
NC
NC
Q8
A
A
C
A
A
NC
D0
Q0
R
TDO
TCK
A
A
A
C
A
A
A
TMS
TDI
Note
1. NC/36M, NC/72M, NC/144M, and NC/288M are not connected to the die and can be tied to any voltage level.
Document Number: 38-05620 Rev. *F
Page 5 of 32
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