MC10SX1405FJ 查看數據表（PDF） - Motorola => Freescale

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MC10SX1405FJ

155Mb/s / 622Mb/s Transmitter (Multiplexer) with Clock Generation

Motorola => Freescale 

MC10SX1405

internal pull–up is provided on LSS allowing the device

to operate in OC–3 mode if LSS is not used.

Nibble / Byte Select (NBB) – In OC–3 mode, selects

between 4–bit (Nibble) and 8–bit (Byte) parallel data

input format. LOW = Byte, HIGH = Nibble. An internal

pull–up is provided on NBB allowing the device to

operate in Nibble mode if NBB is not used.

External Clock Select (ECSN) – Allows external

high–frequency bit clock to be applied and bypasses

the internal clock generation circuit. LOW = External bit

clock. An internal pull–up is provided on ECSN

allowing the device to operate normally if ECSN is not

used.

VCO Frequency Control Monitor (FCM) – Single ended

reference voltage output generated from the VCO

control voltage. Typically 1.25V and varying from 0.25V

to 2.25V.

Out of Lock Indicator (OOL) – Is set HIGH if the PLL is not

frequency–locked to the input reference clock.

3 45

8 13 23 36 38 27 32

C1 R1

C2 R2

OC3 Mode

C2, C3 = 4700pF

R1, R2 = 1kΩ

OC12 Mode

C2, C3 = TBD

R1, R2 = TBD

52

FILTN

1

FILTC

2

FILTP

SX1405

15 18 41

6 50

49

VBR1

48

VBR2

47

VBR4

46

VBR3

0.1µF

2kΩ

0.1µF

29

Figure 3. SX1405 Typical Operating Circuit

ECLinPS and ECLinPS Lite

3

DL140 — Rev 3

MOTOROLA

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