EM8470 查看數據表（PDF） - Unspecified

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EM8470

MPEG-4 Decoder for Set-top, DVD and Streaming Applications

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EM8470, EM8471, EM8475, EM8476

Motion Compensation Module

The Motion Compensation Module performs all the motion

compensation tasks required to decode MPEG-1, MPEG-2

and MPEG-4 bitstreams. This includes predicting the image

block for the picture being decoded, using pixels from previ-

ously decoded pictures.

Audio Input and Output Interfaces

The audio decoding block supports the following audio bit-

stream formats:

• Dolby Digital with conformance to Group A (20-bit)

• MPEG-1 Layers 1 and 2

• MPEG-4 CELP and Low Complexity AAC (decoded using

software on x86 host CPU)

• 16-bit linear PCM data

• Compressed Dolby Digital and DTS® digital output via

S/PDIF

I2S Digital Audio Output

The I2S serial audio output block receives either the 2-chan-

nel down-mixed decoded Dolby Digital audio, decoded

MPEG-1 audio, decoded MPEG-4 audio or PCM audio data.

It then converts this data into a serial bitstream compatible

with the I2S specification. The 256x Fs serial clock is gener-

ated by an internal digital PLL or an external clock source

may be used.

S/PDIF Digital Audio Output

In addition to receiving the same audio data as the I2S digital

audio output block, the S/PDIF output block can receive

compressed DTS and compressed Dolby Digital audio data.

It then converts this data into a serial bitstream compatible

with the S/PDIF specification.

Analog Stereo Audio Output

The EM8475 and EM8476 include two on-chip audio DACs

that receive the same 2-channel information as the I2S digi-

tal output and convert it to analog.

I2S Digital Audio Input

The EM8475 and EM8476 also support an I2S digital audio

input. This audio data may be output onto the I2S or S/PDIF

outputs.

Video Display Controller

The display controller reads picture data from DRAM and

displays it with proper format, timing and synchronization sig-

nals. This is a real-time process driven by the video clock.

The display controller operates in one of four modes:

• Master mode -- the display controller generates HSYNC and

VSYNC from an internal or external video clock up to 80

MHz

• Slave mode -- the display controller receives HSYNC and

VSYNC from an internal or external video clock up to 80

MHz

The video display timing can be set for interlaced or non-

interlaced (progressive) video output up to 120 Hz.

Sub-Pictures

Sub-pictures are compressed bit maps overlaid on decoded

MPEG video which can be scrolled up and down and faded

in and out. The area, content, color and contrast in every

video field can be changed. These modifications produce

special effects such as highlighting.

OSD (On-Screen Display)

The OSD enables simple full screen graphical menus to be

displayed and blended with the MPEG decoded video and

sub-picture. It supports 4 palletized color depths: 4 colors (2

bits per pixel), 16 colors (4 bits per pixel), 128 colors (7 bits

per pixel) and 256 colors (8 bits per pixel). The bit map can

be compressed using Run-Length Coding (RLC) in 2-, 4- and

7-bit per pixel modes. A 256x32 color look-up table (CLUT) is

provided to convert the 2-, 4-, 7- or 8-bit code into a 24-bit

YCbCr color and 16 levels of alpha blending. The Highlight

function is supported in 2-, 4- and 7-bit per pixel modes.

The OSD supports programmable 3-line flicker filtering to

improve the graphics quality on interlaced displays.

Letterbox Display

Letterbox mode provides vertical downscaling; 16:9 pictures

can be displayed in a letterbox fashion on a traditional 4:3

display.

Pan and Scan Display

Pan and scan mode expands the video image to 16:9. A sec-

tion of the image can be displayed at full height on a 4:3 TV

display.

Sigma Designs, Inc.

355 Fairview Way • Milpitas, CA, USA 95035 • Tel: 408.262.9003 • Fax: 408.957.9740

-4-

www.sigmadesigns.com • sales@sigmadesigns.com

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