IC61LV256 查看數據表（PDF） - Integrated Circuit Solution Inc

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IC61LV256

32K x 8 Hight Speed SRAM with 3.3V

Integrated Circuit Solution Inc 

IC61LV256

32K x 8 HIGH SPEED

CMOS STATIC RAM

FEATURES

• High-speed access times:

-- 8, 10, 12, 15 ns

• Automatic power-down when chip is deselected

• CMOS low power operation

-- 345 mW (max.) operating

-- 7 mW (max.) CMOS standby

• TTL compatible interface levels

• Single 3.3V power supply

• Fully static operation: no clock or refresh

required

• Three-state outputs

DESCRIPTION

The ICSI IC61LV256 is a very high-speed, low power,

32,768-word by 8-bit static RAM. It is fabricated using ICSI's

high-performance CMOS technology. This highly reliable pro-

cess coupled with innovative circuit design techniques, yields

access times as fast as 8 ns maximum.

When CE is HIGH (deselected), the device assumes a standby

mode at which the power dissipation is reduced to

600 µW (typical) with CMOS input levels.

Easy memory expansion is provided by using an active LOW

Chip Enable (CE). The active LOW Write Enable (WE) con-

trols both writing and reading of the memory.

The IC61LV256 is available in the JEDEC standard 28-pin,

300mil SOJ and the 8*13.4mm TSOP-1 package.

FUNCTIONAL BLOCK DIAGRAM

A0-A14

VCC

GND

I/O0-I/O7

DECODER

I/O

DATA

CIRCUIT

256 X 1024

MEMORY ARRAY

COLUMN I/O

CE

OE

CONTROL

CIRCUIT

WE

ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors

which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.

2

Integrated Circuit Solution Inc.

AHSR027-0B 11/28/2003

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