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IDT72413 查看數據表(PDF) - Integrated Device Technology

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产品描述 (功能)
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IDT72413
IDT
Integrated Device Technology IDT
IDT72413 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
IDT72413
CMOS PARALLEL 64 x 5-BIT FIFO WITH FLAGS
APPLICATIONS
OUTPUT
ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
HF OE AF/E
IR
SO
SI
OR
D0
Q0
D1
Q1
D2
Q2
D3
Q3
D4 MR Q4
SHIFT OUT
COMPOSITE
INPUT
READY
HF OE AF/E
IR
SO
SI
OR
D0
Q0
D1
Q1
D2
Q2
D3
Q3
D4 MR Q4
COMPOSITE
OUTPUT
READY
SHIFT IN
HF OE AF/E
IR
SO
SI
OR
D0
Q0
D1
Q1
D2
Q2
D3
Q3
D4 MR Q4
MASTER
RESET
NOTE:
2748 drw 15
1. FIFOs are expandable in width. However, in forming wider words two external gates are required to generate composite Input and Output Ready
flags. This requirement is due to the different fall-through times of the FIFOs.
Figure 13. 64 x 15 FIFO with IDT72413
8-BITS
8-BITS
SYSTEM 1
TWO
IDT72413
64 x 8
SI
SO
ENBL SI
IR
OR
SYSTEM 2
IO RDY
INTERRUPT
ALMOST-FULL/
EMPTY
INTERRUPT
HALF-FULL FLAG
NOTE:
1. Cascading the FIFOs in word width is done by ANDing the IR and OR as shown in Figure 13.
2748 drw 16
Figure 14. Application for IDT72413 for Two Asynchronous Systems
5.02
10

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