IDT72413 查看數據表（PDF） - Integrated Device Technology

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IDT72413

CMOS PARALLEL 64 x 5-BIT FIFO WITH FLAGS

Integrated Device Technology 

IDT72413

CMOS PARALLEL 64 x 5-BIT FIFO WITH FLAGS

TIMING DIAGRAMS (Continued)

MILITARY AND COMMERCIAL TEMPERATURE RANGES

SHIFT IN

SHIFT OUT

OUTPUT READY (1)

NOTE:

1. FIFO initailly empty.

t PT

Figure 7. tPT and tOPH Specification

tOPH

2748 drw 09

MASTER RESET

(1)

INPUT READY

(1)

OUTPUT READY

SHIFT IN

DATA OUTPUTS

HALF-FULL FLAG

ALMOST FULL/

EMPTY FLAG

NOTE:

1. FIFO is partially full..

t MRW

t MRIRL

tMRORL

t MRIRH

t MRS

tMRQ

t MRHF

t MRAFE

Figure 8. Master Reset Timing

2748 drw 10

5.02

8

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