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L80227 查看數據表(PDF) - Unspecified

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L80227 Datasheet PDF : 140 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
2.5.1 100 Mbits/s
2.5.2 10 Mbits/s
2.6 Full-/Half-Duplex Mode
2.6.1 Forcing Full-/Half-Duplex Operation
2.6.2 Full/Half Duplex Indication
2.6.3 Loopback
2.7 10/100 Mbits/s Selection
2.7.1 Forcing 10/100 Mbits/s Operation
2.7.2 Autoselecting 10/100 Mbits/s Operation
2.7.3 10/100 Mbits/s Indication
2.8 Jabber
2.9 Reset
2.10 Receive Polarity Correction
2-32
2-32
2-33
2-34
2-34
2-34
2-35
2-35
2-35
2-36
2-36
2-36
2-37
Chapter 3
Signal Descriptions
3.1 Media Interface Signals
3-2
3.2 Controller Interface Signals (MII)
3-3
3.3 Management Interface (MI)/LED Signals
3-4
3.4 LED Signals
3-6
3.5 Miscellaneous Signals
3-7
3.6 Power Supply
3-8
Chapter 4
Registers
4.1 Bit Types
4-1
4.2 MI Serial Port Register Summary
4-3
4.3 Registers
4-5
4.3.1 Control Register (Register 0)
4-5
4.3.2 Status Register (Register 1)
4-7
4.3.3 PHY ID 1 Register (Register 2)
4-9
4.3.4 PHY ID 2 Register (Register 3)
4-10
4.3.5 AutoNegotiation Advertisement Register
(Register 4)
4-11
4.3.6 AutoNegotiation Remote End Capability Register
4.3.7
(Register 5)
Conguration Register (Register 17)
4-13
4-15
viii
Contents
Copyright © 2000, 2001, 2002 by LSI Logic Corporation. All rights reserved.

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