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MAS3559F 查看數據表(PDF) - Micronas

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MAS3559F Datasheet PDF : 92 Pages
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MAS 35x9F
DATA SHEET
2. Functional Description
2.1. Overview
The MAS 35x9F is intended for use in portable con-
sumer audio applications. It receives parallel or serial
data streams and decodes MPEG Layer 2 and 3
(including the low sampling frequency extensions) and
MPEG 2 AAC. A low bit-rate speech codec, compliant
to the ITU Standard G.729 Annex A, is integrated.
Additional downloadable software modules (SDMI,
other audio/speech encoders/decoders) are available
on request.
2.2. Architecture of the MAS 35x9F
The hardware of the MAS 35x9F consists of a high-
performance RISC Digital Signal Processor (DSP),
and appropriate interfaces. A hardware overview of the
IC is shown in Fig. 2–1.
2.3. DSP Core
The internal processor is a dedicated DSP for
advanced audio applications.
Mic. Input
(incl. Bias)
1
Line Input
2
A/D
S/PDIF Input 1
S/PDIF Input 2
Serial Audio
(I2S, SDI)
Serial Audio
(stream, SDIB)
VBAT
Volt.
Mon.
V1
Div.
V2
Audio Codec
2
DSP Core
ALU MAC
Accumulators
ROM
D0
D1
Registers
Div.
MIX
Audio
Proc.
D/A
Audio
2 Output
Control
DCCF
DCFR
DSP
Codec
Serial
Audio
(I2S, SDO)
S/PDIF
Output
I2C
Interface
I2C
control
Parallel
I/O Bus
(PIO)
Xtal
18.432 MHz
Osc.
Fig. 2–1: The MAS 35x9F architecture
PLL
Synth.
Synthesizer
Clock
Scaler ÷2
8
June 30, 2004; 6251-505-1DS
CLKO
Micronas

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