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MAX1243 查看數據表(PDF) - Maxim Integrated

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MAX1243 Datasheet PDF : 13 Pages
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MAX1242/MAX1243
+2.7V to +5.25V, Low-Power, 10-Bit
Serial ADCs in SO-8
CS
SCLK
DOUT
INTERFACE IDLE
TRACK/HOLD
STATE TRACK
CYCLE TIME
CONVERSION
IN PROGRESS
HOLD
7.5μs (tCONV)
1
4
8
12
16
EOC
EOC
0μs
B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 S1 S0
CLOCK OUT SERIAL DATA
SUB
BITS
TRACK
12.5 × 0.476μs = 5.95μs
TOTAL = 13.7μs
TRAILING
ZEROS
0μs
IDLE
0.24μs
(tCS)
HOLD
Figure 8a. Interface Timing Sequence
CS
SCLK
DOUT
INTERFACE IDLE
TRACK/HOLD
STATE TRACK
CYCLE TIME
CONVERSION
IN PROGRESS
HOLD
7.5μs (tCONV)
1
4
8
EOC
EOC
0μs
B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
CLOCK OUT SERIAL DATA
TRACK
10.5 × 0.476μs = 5μs
TOTAL = 12.74μs
IDLE
0.24μs
(tCS)
Figure 8b. Interface Timing Sequence—Minimum Cycle Time
HOLD
CS
tCS0
SCLK
tDV
DOUT
tAP
INTERNAL
T/H
(TRACK/ACQUIRE)
tCONV
(HOLD)
tDO
tSTR
tCH
tCL
B0
S1
S0
(TRACK/ACQUIRE)
tCS
tTR
Figure 9. Detailed Serial-Interface Timing
Maxim Integrated
9

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