MAX17000A(2008_10) 查看數據表（PDF） - Maxim Integrated
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MAX17000A Datasheet PDF : 31 Pages
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Complete DDR2 and DDR3 Memory
Power-Management Solution
Pin Description
PIN
NAME
FUNCTION
OVP Mode Control. This input selectively enables/disables the SMPS OV protection feature and
output discharge mode. When enabled, the SMPS OV protection feature is enabled. Connect OVP to
1
OVP the following voltage levels for the desired function:
High (> 2.4V) = Enable SMPS OV protection, and SMPS and VTT discharge FETs.
Low (GND) = Disable SMPS OV protection, and SMPS and VTT discharge FETs.
Open-Drain Power-Good Output. PGOOD1 is low when the SMPS output voltage is more than 15%
2
PGOOD1
(typ) beyond the normal regulation point, during soft-start, and in shutdown.
After the soft-start circuit has terminated, PGOOD1 becomes high impedance if the SMPS output is
in regulation.
Open-Drain Power-Good Output. PGOOD2 is low when the VTT output voltage is more than 10% (typ)
3
PGOOD2
beyond the normal regulation point, in shutdown, and in standby.
After the SMPS soft-start circuit has terminated, PGOOD2 becomes high impedance if the VTT output
is in regulation.
4
STDBY
Standby Control Input. When SHDN is high and STDBY is low, the MAX17000A turns off the VTT output
(high-Z). When STDBY is high, normal SMPS operation resumes and the VTT output is enabled.
5
VTTS
Sense Pin for Termination Supply Output. Normally connected to the VTT pin to allow accurate
regulation to VCSL/2 or the REFIN voltage.
Termination Reference Buffer Output. VTTR tracks VCSL/2 when REFIN is connected to VCC. VTTR
6
VTTR tracks VREFIN when a voltage between 0.5V to 1.5V is set at REFIN. Decouple VTTR to AGND with a
0.33μF ceramic capacitor.
7
PGND2 Power Ground for VTT. Connect PGND2 externally to the underside of the exposed pad.
8
VTT
Termination Power-Supply Output. Connect VTT to VTTS to regulate the VTT voltage to the VTTS
regulation setting.
9
VTTI
Termination Power-Supply Input. VTTI is the input power supply to the VTT linear regulator. Normally
connected to the output of the SMPS regulator for DDR applications.
External Reference Input. REFIN sets the feedback regulation voltage (VTTR = VTTS = VREFIN) of the
10
REFIN MAX17000A.
Connect REFIN to VCC to use the internal VCSL/2 divider.
Connect a 0.5V to 1.5V voltage input to set the adjustable output for VTT, VTTS, and VTTR.
Feedback Input for SMPS Output. Connect to VCC for a fixed +1.8V output or to AGND for a fixed
11
FB
+1.5V output. For an adjustable output (1.0V to 2.7V), connect FB to a resistive divider from the
output voltage. FB regulates to +1.0V.
Negative Input of the PWM Output Current-Sense and Supply Input for VTTR. Connect CSL to the
12
CSL
negative side of the output current-sensing resistor or the filtering capacitor if the DC resistance of
the output inductor is utilized for current sensing.
CSL is also the path for the internal 16 discharge MOSFET when VCC UVLO occurs with OVP enabled.
Positive Input of the PWM Output Current Sense. Connect CSH to the positive side of the output
13
CSH current-sensing resistor or the filtering capacitor if the DC resistance of the output inductor is
utilized for current sensing.
12 ______________________________________________________________________________________
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