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MAX3072EESA 查看數據表(PDF) - Maxim Integrated

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MAX3072EESA Datasheet PDF : 25 Pages
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+3.3V, ±15kV ESD-Protected, Fail-Safe,
Hot-Swap, RS-485/RS-422 Transceivers
Test Circuits and Waveforms (continued)
B
RECEIVER
ATE
VID
OUTPUT
R
A
Figure 6. Receiver Propagation Delay Test Circuit
A
B
VOH
VOL 1.5V
RO
tRPLH
THE RISE TIME AND FALL TIME OF INPUTS A AND B < 4ns
Figure 7. Receiver Propagation Delays
+1V
-1V
tRPHL
+1.5V
S3
-1.5V
VID R
1k
CL
15pF
S1
VCC
S2
GENERATOR
50
S1 OPEN
S2 CLOSED
S3 = +1.5V
3V
S1 CLOSED
S2 OPEN
S3 = -1.5V
3V
1.5V
RE
RE
0
0
tRZH, tRZH(SHDN)
tRZL, tRZL(SHDN)
RO
VOH
VCC
VOH / 2
RO
0
(VOL + VCC) / 2
VOL
S1 OPEN
S2 CLOSED
S3 = +1.5V
1.5V
RE
tRHZ
0.25V
RO
S1 CLOSED
S2 OPEN
S3 = -1.5V
3V
3V
1.5V
0
RE
0
tRLZ
VCC
VOH
RO
0
0.25V
VOL
Figure 8. Receiver Enable and Disable Times
______________________________________________________________________________________ 11

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