MAX6971 查看數據表（PDF） - Maxim Integrated
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MAX6971 Datasheet PDF : 12 Pages
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16-Port, 36V Constant-Current LED Driver
LE
tLRF
OUT_
LE
tLRR
OUT_
CLK
tCRF
OUT_
CLK
tCRR
OUT_
Figure 3. LE and CLK to OUT_ Timing
CLK is the serial-clock input, which shifts data at DIN
into the MAX6971 16-bit shift register on its rising edge.
LE is the latch load input of the MAX6971 that transfers
data from the MAX6971 16-bit shift register to its 16-bit
latch when LE is high (transparent latch), and latches
the data on the falling edge of LE (Figure 2).
The fourth input provides output-enable control of the
output drivers. OE is high to force outputs
OUT0–OUT15 high impedance, without altering the
contents of the output latches, and low to enable out-
puts OUT0–OUT15 to follow the state of the output
latches.
OE is independent of the operation of the serial inter-
face. Data can be shifted into the serial-interface shift
register and latched, regardless of the state of OE.
DOUT is the serial-data output, which shifts data out
from the MAX6971’s 16-bit shift register on the rising
edge of CLK. Data at DIN is propagated through the
shift register and appears at DOUT 16 clock cycles later.
Table 1. 4-Wire Serial-Interface Truth Table
SERIAL
DATA
INPUT
CLOCK
INPUT
CLK
DIN
D0
SHIFT-REGISTER
CONTENTS
D1 D2 … Dn-1 Dn
LOAD
INPUT
LE
LATCH CONTENTS
BLANKING
D0 D1 D2 … Dn-1 Dn
INPUT
OE
OUTPUT CONTENTS
D0 D1 D2 … Dn-1 Dn
H
H R1 R2 … Rn-2 Rn-1 —
L
L R1 R2 … Rn-2 Rn-1 —
X
R0 R1 R2 … Rn-1 Rn —
—
— X X X…X X H
—
— P1 P2 P3 … Pn-1 Pn L
—
— —————— —
L = Low-logic level.
H = High-logic level.
X = Don’t care.
P = Present state.
R = Previous state.
Hi-Z = High impedance.
— —————
— —————
— —————
R0 R1 R2 — Rn-1 Rn
P0 P1 P2 … Pn-1 Pn
X X X…X X
—
— —————
—
— —————
—
— —————
—
— —————
L
P0 P1 P2 … Pn-1 Pn
H
Hi-Z Hi-Z Hi-Z … Hi-Z Hi-Z
8 _______________________________________________________________________________________
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