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MAX6974 查看數據表(PDF) - Maxim Integrated

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MAX6974 Datasheet PDF : 23 Pages
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24-Output PWM LED Drivers
for Message Boards
(PWM) value. Each output current driver in the R, G,
and B ports has a unique 12-bit (MAX6974) or 14-bit
(MAX6975) PWM control value providing fine resolution
adjustment of average current output. Each bit time of
the PWM corresponds to one period of CLKI (TCLKI).
The PWM setting determines the amount of time, out of
the total period, that the output is on. The subframes
have PWM off-zones at the start (tSPWM) and end
(tEPWM) of the PWM period (see Figure 3). The sub-
frame period and PWM off zones are shown in Table 2
for each device.
The MAX6974 subdivides each subframe by 4096
(12-bit) PWM steps and has 16 cycle off zones, leaving
an active PWM region of 4064 PWM steps ranging from
Table 2. Subframe and PWM Timing
PART
MAX6974
MAX6975
SUBFRAME
(TCLKI)
4096
16,384
tSPWM
(TCLKI)
16
32
tEPWM
(TCLKI)
16
32
tEMUX
(TCLKI)
16
32
16 to 4079. The MAX6975 subdivides each subframe
by 16,384 (14-bit) PWM steps and has 32 cycle off
zones, leaving an active PWM region of 16,320 PWM
steps ranging from 32 to 16,351. The PWM phase for
outputs R0, R2, R4, R6, G0, G2, G4, G6, B0, B2, B4,
and B6 use phasing with the outputs on first and off
second. Inverse phasing is used for outputs R1, R3,
R5, R7, G1, G3, G5, G7, B1, B3, B5, and B7 as shown
in Figure 3 to balance the timing of loads on the LED
anode power supply.
In multiplexed operation, the subframes are shared
between MUX0 and MUX1 active times, effectively
reducing the number of subframes by 2.
LED-Intensity Control Example
The three levels of intensity control are shown in Figure 2
for one LED output driver in a MAX6974 in nonmulti-
plexed mode. As an example, the CALDAC is set to
169DEC, setting the port output current level to 21.8mA.
The global-intensity PDM value is set to 96DEC, producing
an even distribution of ON subframes out of the 128
MULTIPLEXED
SUBFRAME (n), MUX0
MUX0
MUX1
SUBFRAME (n), MUX1
tEMUX
tEMUX
R0, R2, R4, R6
G0, G2, G4, G6
B0, B2, B4, B6
R1, R3, R5, R7
G1, G3, G5, G7
B1, B3, B5, B7
tSPWM
50%
tSPWM
ON/OFF PHASING
25%
OFF/ON PHASING
75%
tSPWM
100%
tEPWM
R0, R2, R4, R6
G0, G2, G4, G6
B0, B2, B4, B6
NONMULTIPLEXED
SUBFRAME (n)
tSPWM
tEPWM
75%
ON/OFF PHASING
SUBFRAME (n + 1)
75%
R1, R3, R5, R7
G1, G3, G5, G7
75%
75%
B1, B3, B5, B7
OFF/ON PHASING
Figure 3. Multiplexed and Nonmultiplexed Output Driver Phasing and Example PWM Values
10 ______________________________________________________________________________________

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