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MAX6972 查看數據表(PDF) - Maxim Integrated

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MAX6972 Datasheet PDF : 23 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
PIN
1,17
2
3
4
5
6
7
8
9–16
18
19
20
21
22
23
24
25–32
EP
NAME
VDD
MUX0
CLKI+
CLKI-
DIN+
DIN-
LOADI
I.C.
Y0–Y7
LOADO
DOUT-
DOUT+
CLKO-
CLKO+
MUX1
AGND
Z7–Z0
GND
16-Output PWM LED Drivers
for Message Boards
Pin Description
FUNCTION
Positive Supply Voltage. Bypass VDD to GND with a 0.1µF ceramic capacitor.
Multiplex 0 Active-Low, Open-Drain Output. Use MUX0 to drive a pnp transistor.
PWM and Serial-Interface Noninverting Clock LVDS Input
PWM and Serial-Interface Inverting Clock LVDS Input
Serial-Interface Noninverting Data LVDS Input
Serial-Interface Inverting Data LVDS Input
Serial-Interface Load CMOS Input
Internally Connected. Connect to GND.
Y LED Drive Outputs. Y0 to Y7 are open-drain, constant-current sinks.
Serial-Interface Load CMOS Output
Serial-Interface Inverting Data LVDS Output
Serial-Interface Noninverting Data LVDS Output
PWM and Serial-Interface Inverting Clock LVDS Output
PWM and Serial-Interface Noninverting Clock LVDS Output
Multiplex 1 Active-Low, Open-Drain Output. Use MUX1 to drive a pnp transistor.
Analog Ground. Connect to GND.
Z LED Drive Outputs. Z0 to Z7 are open-drain, constant-current sinks.
Power Ground. Exposed pad on package underside must be connected to GND.
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