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MB89P817APF(1994) 查看數據表(PDF) - Fujitsu

零件编号
产品描述 (功能)
生产厂家
MB89P817APF
(Rev.:1994)
Fujitsu
Fujitsu Fujitsu
MB89P817APF Datasheet PDF : 36 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
MB89810A Series
s BLOCK DIAGRAM
X0
X1
X0A
X1A
Main clock
oscillator
Clock controlletr
Subclock
oscillator
RST
Reset circuit
(WDT)
8
P00 to P07
8
P10 to P17
Port 0 and port 1
CMOS I/O port
8
P20 to P27
Port 2
CMOS output port
RAM
(2048 × 8 bits)
F2MC-8L
CPU
ROM
(24 K × 8 bits)
Other pins
VCC × 2, VSS × 2
MOD0, MOD1
12
Time-base
timer
8-bit PWM
timer 2
P37/PTO2
8-bit PWM
timer 1
P36/PTO1
8-bit serial
I/O 1
Pulse width
detection
CMOS I/O port
UART
16-bit
timer/counter
P31/SCK
P33/SI
P32/SO
P30/PWE
P35/PWI
P34/PWO
P44/SCL1
P47/SCL2
P43/RXD1
P46/RXD2
P42/TXD1
P45/TXD2
P41/EC
CMOS I/O port
Port 5
N-ch open-drain
I/O port
P40
5
P50 to P54
External
8
interrupt
8 P60/INT0
to P67/INT7
Input port

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