56F8123 查看數據表（PDF） - Motorola => Freescale
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56F8123 Datasheet PDF : 140 Pages
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Table 2-2 Signal and Package Information for the 64-Pin LQFP
Signal Name Pin No.
Type
State During
Reset
Signal Description
PHASEB0
51
Schmitt
Input
Input Phase B — Quadrature Decoder 0, PHASEB input
(TA1)
Schmitt
Input/
Output
Input TA1 — Timer A ,Channel 1
(GPIOB6)
Schmitt
Input/
Output
Input
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
(SYS_CLK2)
Output
Output Clock Output - can be used to monitor the internal SYS_CLK2
signal (see Part 6.5.7 CLKO Select Register, SIM_CLKOSR).
In the 56F8323, the default state after reset is PHASEB0.
INDEX0
50
Schmitt
Input
Input
In the 56F8123, the default state is not one of the functions offered
and must be reconfigured.
Index — Quadrature Decoder 0, INDEX input
(TA2)
(GPIOB5)
(SYS_CLK)
Schmitt
Input/
Output
Schmitt
Input/
Output
Output
Input TA2 — Timer A, Channel 2
Input
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
Output
Clock Output - can be used to monitor the internal SYS_CLK signal
(see Part 6.5.7 CLKO Select Register, SIM_CLKOSR).
In the 56F8323, the default state after reset is INDEX0.
In the 56F8123, the default state is not one of the functions offered
and must be reconfigured.
56F8323 Technical Data, Rev. 11.0
20
Freescale Semiconductor
Preliminary
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