MC74HC112 查看數據表（PDF） - ON Semiconductor

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MC74HC112

Dual J-K Flip-Flop with Set and Reset

ON Semiconductor 

MC74HC112A

SWITCHING WAVEFORMS

tf

tr

90%

VCC

CLOCK

50%

10%

GND

tw

1/fmax

tPLH

tPHL

90%

Q or Q 50%

10%

tTLH

tTHL

Figure 1.

tw

VCC

SET OR

50%

RESET

GND

tPHL

Q OR Q

50%

tPLH

Q OR Q

50%

trec

CLOCK

VCC

50%

GND

Figure 2.

VALID

VCC

J OR K

50%

GND

tsu

th

VCC

CLOCK

50%

GND

Figure 3.

DEVICE

UNDER

TEST

TEST POINT

OUTPUT

CL*

*Includes all probe and jig capacitance

Figure 4. Test Circuit

RESET 15, 14

J 3, 11

K 2,12

CL

1, 13

CLOCK

SET 4, 10

EXPANDED LOGIC DIAGRAM

CL

CL

CL

CL

CL

CL

CL

CL

CL

5, 9

Q

CL

CL

6, 7

Q

CL

CL

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