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MC74LCX125 查看數據表(PDF) - Motorola => Freescale

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MC74LCX125 Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Low-Voltage CMOS Quad
Buffer
With 5V-Tolerant Inputs and Outputs
(3-State, Non-Inverting)
MC74LCX125
The MC74LCX125 is a high performance, non–inverting quad buffer
operating from a 2.7 to 3.6V supply. High impedance TTL compatible
inputs significantly reduce current loading to input drivers while TTL
compatible outputs offer improved switching noise performance. A VI
specification of 5.5V allows MC74LCX125 inputs to be safely driven from
5V devices. The MC74LCX125 is suitable for memory address driving
and all TTL level bus oriented transceiver applications.
Current drive capability is 24mA at the outputs. The Output Enable
(OEn) inputs, when HIGH, disable the outputs by placing them in a HIGH
Z condition.
Designed for 2.7 to 3.6V VCC Operation
5V Tolerant — Interface Capability With 5V TTL Logic
Supports Live Insertion and Withdrawal
IOFF Specification Guarantees High Impedance When VCC = 0V
LVTTL Compatible
LVCMOS Compatible
24mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current in All Three Logic States (10µA)
Substantially Reduces System Power Requirements
Latchup Performance Exceeds 500mA
ESD Performance: Human Body Model >2000V; Machine Model >200V
Pinout: 14–Lead (Top View)
VCC OE3 D3 O3 OE2 D2 O2
14 13 12 11 10 9 8
LOW–VOLTAGE CMOS
QUAD BUFFER
14
1
14
1
14
1
14
1
D SUFFIX
PLASTIC SOIC
CASE 751A–03
M SUFFIX
PLASTIC SOIC EIAJ
CASE 965–01
SD SUFFIX
PLASTIC SSOP
CASE 940A–03
DT SUFFIX
PLASTIC TSSOP
CASE 948G–01
1234567
OE0 D0 O0 OE1 D1 O1 GND
1
OE0
2
D0
4
OE1
5
D1
LOGIC DIAGRAM
10
OE2
3
O0
9
D2
13
OE3
6
O1
12
D3
8
O2
11
O3
PIN NAMES
Pins
Function
OEn
Dn
On
Output Enable Inputs
Data Inputs
3–State Outputs
FUNCTION TABLE
INPUTS
OEn
Dn
L
L
L
H
H
X
OUTPUTS
On
L
H
Z
H = High Voltage Level; L = Low Voltage Level; Z = High Imped-
ance State; X = High or Low Voltage Level and Transitions Are
Acceptable, for ICC reasons, DO NOT FLOAT Inputs
11/96
© Motorola, Inc. 1996
1
REV 1

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