MN103SFB9R 查看數據表（PDF） - Panasonic Corporation

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MN103SFB9R

Microcontroller

Panasonic Corporation 

MN103SB9 Series

Type

Internal ROM type

ROM (byte)

RAM (byte)

Package (Lead-free)

Minimum Instruction

Execution Time

MN103SB9N

Mask ROM

512K

32K

TQFP128-P-1414A

MN103SFB9R

FLASH

1024K

16.7 ns (at 2.7 V to 3.6 V, 60 MHz)

 Interrupts

RESET. IRQ × 9. NMI. Timer × 28. I2C × 3. SIF × 10. DMA × 12. WDT. A/D. Time base timer × 2. System error

 Timer Counter

8-bit timer × 10

Reload-down count. Cascade connection possible (usable as a 16-bit to 32-bit timer)

16-bit timer × 6

Up-down count. Input capture. PWM output. Compare/capture register 2 channnels

Time base timer × 1

Watchdog timer × 1

 Serial interface

UART/Synchronous/Multi-master I2C interface selective × 3

UART/Synchronous interface selective × 2

 DMA controller

Number of channels: 4 channels

Unit of transfer: 8/16/32 bits

Maximum transfer cycles: 65535

Starting factor: External interrupt. Timer. Serial transmission/reception. A/D conversion finish. I2C transmission/reception. External

transmission request. Software

Transfer method: 2-bus cycle transfer

Adressing modes: Fixed. Increment. Decrement

Transfer mode: Word transfer. Burst transfer. Intermittent transfer

 Extended Calculation

Multiply and accumulate arithmetic. Multiplication. Saturated arithmetic

 I/O Pins

I/O

104 : Common use

 A/D converter

10-bit × 12 channels

 ROM Correction

8 channels

 Electrical Charactreistics (A/D converter characteristics)

Parameter

Symbol

Condition

Resolution

Non-linear error

Differential non-linearity error

AVDD = 3.3 V. VSS = 0 V

min

Limit

typ max

Unit

10 Bits

±4 LSB

±4 LSB

MAF00023DEM

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