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PI74ALVCH16952 查看數據表(PDF) - Pericom Semiconductor

零件编号
产品描述 (功能)
生产厂家
PI74ALVCH16952
Pericom-Semiconductor
Pericom Semiconductor Pericom-Semiconductor
PI74ALVCH16952 Datasheet PDF : 5 Pages
1 2 3 4 5
PI74ALVCH16952
1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122
16-Bit Registered Transceiver
With 3-STATE Outputs
Product Features
PI74ALVCH16952 is designed for low voltage operation
VCC = 2.3V to 3.6V
Hysteresis on all inputs
Typical VOLP (Output Ground Bounce)
< 0.8V at VCC = 3.3V, TA = 25°C
Typical VOHV (Output VOH Undershoot)
< 2.0V at VCC = 3.3V, TA = 25°C
Bus Hold retains last active bus state during 3-STATE
eliminating the need for external pullup resistors
Industrial operation at –40°C to +85°C
Packages available:
– 48-pin 240 mil wide plastic TSSOP (A)
– 48-pin 300 mil wide plastic SSOP (V)
Logic Block Diagram
Product Description
Pericom Semiconductor’s PI74ALVCH series of logic circuits are
produced using the Company’s advanced 0.5 micron CMOS
technology, achieving industry leading speed.
The PI74ALVCH16952 16-bit registered transceiver is designed for
2.3V to 3.6V VCC operation.
The product contains two sets of D-type flip-flops for temporary
storage of data flowing in either direction. The device can be used
as two 8-bit transceivers or one 16-bit tranceiver. Data on the A or
B bus is stored in the registers on the low-to-high transition of the
clock (CLKAB or CLKBA) input provided that the clock-enable
(CLKENAB or CLKENBA) input is low. Taking the output-enable
(OEAB or OEBA) input low accesses the data on either port.
To ensure the high-impedance state during power up or power down,
OE should be tied to Vcc through a pull-up resistor; the minimum
value of the resistor is determined by the current-sinking capability
of the driver.
The PI74ALVCH16952 has “Bus Hold” which retains the data
input’s last state whenever the data input goes to high-impedance
preventing “floating” inputs and eliminating the need for pullup/
down resistors.
3
1CLKENAB
2
1CLKAB
1OEBA 56
54
1CLKENBA
55
1CLKBA
1
1OEAB
5
1A1
One of Eight
Channels
C1
CE
1D
C1
CE
1D
52
1B1
26
2CLKENAB
27
2CLKAB
2OEBA 29
15
2A1
One of Eight
Channels
To Seven Other Channels
C1
CE
1D
C1
CE
1D
31
2CLKENBA
30
2CLKBA
28
2OEAB
42
2B1
To Seven Other Channels
1
PS8197A 10/16/00

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