74ALVC162835 查看數據表（PDF） - Pericom Semiconductor Corporation
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74ALVC162835 Datasheet PDF : 5 Pages
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PI74ALVC162835
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Product Pin Description
Pin Name
OE
LE
CLK
A
Y
GND
VCC
Description
Output Enable Input (Active LOW)
Latch Enable
Clock Input
Data Input
Data Output
Ground
Power
Product Pin Configuration
NC
1
56
GND
NC
2
55 NC
Y1
3
54 A1
GND
4
53
GND
Y2
5
52 A2
Y3
6
51 A3
VCC
7
50
VCC
Y4
8
49 A4
Y5
9
48 A5
Y6 10
47 A6
GND 11
46
GND
Y7 12
45 A7
Y8 13 56-PIN 44 A8
Y9 14 A-56 43 A9
Y10
15 K-56 42
A10
Y11
16 V-56 41
A11
Y12 17
40
A12
GND 18
39
GND
Y13 19
38
A13
Y14 20
37
A14
Y15 21
36
A15
VCC
22
Y16 23
35
VCC
34
A16
Y17 24
33
A17
GND 25
32
GND
Y18 26
31
A18
OE 27
30
CLK
LE 28
29
GND
Truth Table(1)†
Inputs
Outputs
OE
LE
CLK
A
Y
H
X
X
X
Z
L
H
X
L
L
L
H
X
H
H
L
L
↑
L
L
L
L
↑
H
H
L
L
H
X
Yo(2)
L
L
L
X
Yo(3)
Notes:
1 H = High Signal Level
L = Low Signal Level
Z = High Impedance
↑ = Transition LOW-to-HIGH
X = Irrelevant
2. Output level before the indicated steady-state input
conditions were established, provided that CLK is high
before LE goes low.
3. Output level before the indicated steady-state input
conditions were established.
2
PS8179A 02/03/99
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